Test Failure: Transforms/IRCE/wide_indvar.ll

Test source: git

Comments: LLVM PR57523

Log:


stderr:

RUN: at line 2: /home/nlopes/alive2/build/opt-alive.sh -verify-loop-info -irce-print-changed-loops -passes=irce -irce-allow-narrow-latch=true -S < /bitbucket/nlopes/llvm/llvm/test/Transforms/IRCE/wide_indvar.ll 2>&1 | /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/IRCE/wide_indvar.ll
+ /home/nlopes/alive2/build/opt-alive.sh -verify-loop-info -irce-print-changed-loops -passes=irce -irce-allow-narrow-latch=true -S
+ /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/IRCE/wide_indvar.ll
/bitbucket/nlopes/llvm/llvm/test/Transforms/IRCE/wide_indvar.ll:7:16: error: CHECK-LABEL: expected string not found in input
; CHECK-LABEL: define i32 @test_increasing_slt_slt_wide_simple_no_postloop() {
               ^
<stdin>:1:1: note: scanning from here
irce: in function test_increasing_slt_slt_wide_simple_no_postloop: constrained Loop at depth 1 containing: %loop<header><exiting>,%backedge<latch><exiting>
^
<stdin>:1:7: note: possible intended match here
irce: in function test_increasing_slt_slt_wide_simple_no_postloop: constrained Loop at depth 1 containing: %loop<header><exiting>,%backedge<latch><exiting>
      ^

Input file: <stdin>
Check file: /bitbucket/nlopes/llvm/llvm/test/Transforms/IRCE/wide_indvar.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           1: irce: in function test_increasing_slt_slt_wide_simple_no_postloop: constrained Loop at depth 1 containing: %loop<header><exiting>,%backedge<latch><exiting> 
label:7'0     X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
label:7'1           ?                                                                                                                                                      possible intended match
           2: irce: in function test_increasing_slt_slt_wide_simple_postloop: constrained Loop at depth 1 containing: %loop<header><exiting>,%backedge<latch><exiting> 
label:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           3: irce: in function test_increasing_slt_slt_wide_non-negative: constrained Loop at depth 1 containing: %loop<header><exiting>,%backedge<latch><exiting> 
label:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           4:  
label:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>

 

<-- Back