Test Failure: Transforms/StraightLineStrengthReduce/slsr-add.ll

Test source: git

Log:

Source: <stdin>

----------------------------------------
define void @shl(i32 %b, i32 %s) {
%0:
  %t1 = add i32 %b, %s
  call void @foo(i32 %t1)
  %s2 = shl i32 %s, 1
  %t2 = add i32 %b, %s2
  call void @foo(i32 %t2)
  ret void
}
=>
define void @shl(i32 %b, i32 %s) {
%0:
  %t1 = add i32 %b, %s
  call void @foo(i32 %t1)
  %t2 = add i32 %t1, %s
  call void @foo(i32 %t2)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @stride_is_2s(i32 %b, i32 %s) {
%0:
  %s2 = shl i32 %s, 1
  %t1 = add i32 %b, %s2
  call void @foo(i32 %t1)
  %s4 = shl i32 %s, 2
  %t2 = add i32 %b, %s4
  call void @foo(i32 %t2)
  %s6 = mul i32 %s, 6
  %t3 = add i32 %b, %s6
  call void @foo(i32 %t3)
  ret void
}
=>
define void @stride_is_2s(i32 %b, i32 %s) {
%0:
  %s2 = shl i32 %s, 1
  %t1 = add i32 %b, %s2
  call void @foo(i32 %t1)
  %t2 = add i32 %t1, %s2
  call void @foo(i32 %t2)
  %t3 = add i32 %t2, %s2
  call void @foo(i32 %t3)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @stride_is_3s(i32 %b, i32 %s) {
%0:
  %t1 = add i32 %s, %b
  call void @foo(i32 %t1)
  %s4 = shl i32 %s, 2
  %t2 = add i32 %s4, %b
  call void @foo(i32 %t2)
  %s7 = mul i32 %s, 7
  %t3 = add i32 %s7, %b
  call void @foo(i32 %t3)
  ret void
}
=>
define void @stride_is_3s(i32 %b, i32 %s) {
%0:
  %t1 = add i32 %s, %b
  call void @foo(i32 %t1)
  %1 = mul i32 %s, 3
  %t2 = add i32 %t1, %1
  call void @foo(i32 %t2)
  %t3 = add i32 %t2, %1
  call void @foo(i32 %t3)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @stride_is_minus_2s(i32 %b, i32 %s) {
%0:
  %s6 = mul i32 %s, 6
  %t1 = add i32 %b, %s6
  call void @foo(i32 %t1)
  %s4 = shl i32 %s, 2
  %t2 = add i32 %b, %s4
  call void @foo(i32 %t2)
  %s2 = shl i32 %s, 1
  %t3 = add i32 %b, %s2
  call void @foo(i32 %t3)
  ret void
}
=>
define void @stride_is_minus_2s(i32 %b, i32 %s) {
%0:
  %s6 = mul i32 %s, 6
  %t1 = add i32 %b, %s6
  call void @foo(i32 %t1)
  %1 = shl i32 %s, 1
  %t2 = sub i32 %t1, %1
  call void @foo(i32 %t2)
  %t3 = sub i32 %t2, %1
  call void @foo(i32 %t3)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @stride_is_minus_2s_vec(<2 x i32> %b, <2 x i32> %s) {
%0:
  %s6 = mul <2 x i32> %s, { 6, 6 }
  %t1 = add <2 x i32> %b, %s6
  call void @voo(<2 x i32> %t1)
  %s4 = shl <2 x i32> %s, { 2, 2 }
  %t2 = add <2 x i32> %b, %s4
  call void @voo(<2 x i32> %t2)
  %s2 = shl <2 x i32> %s, { 1, 1 }
  %t3 = add <2 x i32> %b, %s2
  call void @voo(<2 x i32> %t3)
  ret void
}
=>
define void @stride_is_minus_2s_vec(<2 x i32> %b, <2 x i32> %s) {
%0:
  %s6 = mul <2 x i32> %s, { 6, 6 }
  %t1 = add <2 x i32> %b, %s6
  call void @voo(<2 x i32> %t1)
  %s4 = shl <2 x i32> %s, { 2, 2 }
  %t2 = add <2 x i32> %b, %s4
  call void @voo(<2 x i32> %t2)
  %s2 = shl <2 x i32> %s, { 1, 1 }
  %t3 = add <2 x i32> %b, %s2
  call void @voo(<2 x i32> %t3)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @simple_enough(i32 %b, i32 %s) {
%0:
  %s8 = shl i32 %s, 3
  %t1 = add i32 %b, %s8
  call void @foo(i32 %t1)
  %t2 = add i32 %b, %s
  call void @foo(i32 %t2)
  ret void
}
=>
define void @simple_enough(i32 %b, i32 %s) {
%0:
  %s8 = shl i32 %s, 3
  %t1 = add i32 %b, %s8
  call void @foo(i32 %t1)
  %t2 = add i32 %b, %s
  call void @foo(i32 %t2)
  ret void
}
Transformation doesn't verify!
ERROR: Timeout


----------------------------------------
define void @slsr_strided_add_128bit(i128 %b, i128 %s) {
%0:
  %s125 = shl i128 %s, 125
  %s126 = shl i128 %s, 126
  %t1 = add i128 %b, %s125
  call void @bar(i128 %t1)
  %t2 = add i128 %b, %s126
  call void @bar(i128 %t2)
  ret void
}
=>
define void @slsr_strided_add_128bit(i128 %b, i128 %s) {
%0:
  %s125 = shl i128 %s, 125
  %t1 = add i128 %b, %s125
  call void @bar(i128 %t1)
  %t2 = add i128 %t1, %s125
  call void @bar(i128 %t2)
  ret void
}
Transformation doesn't verify!
ERROR: Source is more defined than target

Example:
i128 %b = undef
i128 %s = undef

Source:
i128 %s125 = #x00000000000000000000000000000000 (0)	[based on undef value]
i128 %s126 = #x00000000000000000000000000000000 (0)	[based on undef value]
i128 %t1 = undef
i128 %t2 = undef

SOURCE MEMORY STATE
===================
NON-LOCAL BLOCKS:
Block 0 >	size: 0	align: 1	alloc type: 0
Block 1 >	size: 1	align: 2	alloc type: 0

Target:
i128 %s125 = #x00000000000000000000000000000000 (0)
i128 %t1 = undef
i128 %t2 = undef



------------------- SMT STATS -------------------
Num queries: 21
Num invalid: 0
Num skips:   0
Num trivial: 0 (0.0%)
Num timeout: 6 (28.6%)
Num errors:  0 (0.0%)
Num SAT:     10 (47.6%)
Num UNSAT:   5 (23.8%)

stderr:

+ : 'RUN: at line 2'
+ /home/nlopes/alive2/scripts/opt-alive.sh -slsr -gvn -S
+ /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll

Alive2: Transform doesn't verify; aborting!
FileCheck error: '<stdin>' is empty.
FileCheck command line:  /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll

NOTE: This test would pass if undef didn't exist!

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