Test source: git
Source: <stdin> ---------------------------------------- define i64 @test1(i32 %x) { %0: %t = ctpop i32 %x %s = sext i32 %t to i64 ret i64 %s } => define i64 @test1(i32 %x) { %0: %t = ctpop i32 %x %range_l#0%t = icmp sge i32 %t, 0 %range_h#0%t = icmp slt i32 %t, 33 %range#0%t = and i1 %range_l#0%t, %range_h#0%t assume_non_poison i1 %range#0%t %s = zext i32 %t to i64 ret i64 %s } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i64 @test2(i32 %x) { %0: %t = ctlz i32 %x, 1 %s = sext i32 %t to i64 ret i64 %s } => define i64 @test2(i32 %x) { %0: %t = ctlz i32 %x, 1 %range_l#0%t = icmp sge i32 %t, 0 %range_h#0%t = icmp slt i32 %t, 33 %range#0%t = and i1 %range_l#0%t, %range_h#0%t assume_non_poison i1 %range#0%t %s = zext i32 %t to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i64 @test3(i32 %x) { %0: %t = cttz i32 %x, 1 %s = sext i32 %t to i64 ret i64 %s } => define i64 @test3(i32 %x) { %0: %t = cttz i32 %x, 1 %range_l#0%t = icmp sge i32 %t, 0 %range_h#0%t = icmp slt i32 %t, 33 %range#0%t = and i1 %range_l#0%t, %range_h#0%t assume_non_poison i1 %range#0%t %s = zext i32 %t to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i64 @test4(i32 %x) { %0: %t = udiv i32 %x, 3 %s = sext i32 %t to i64 ret i64 %s } => define i64 @test4(i32 %x) { %0: %t = udiv i32 %x, 3 %s = zext i32 %t to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i64 @test5(i32 %x) { %0: %t = urem i32 %x, 30000 %s = sext i32 %t to i64 ret i64 %s } => define i64 @test5(i32 %x) { %0: %t = urem i32 %x, 30000 %s = zext i32 %t to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i64 @test6(i32 %x) { %0: %u = lshr i32 %x, 3 %t = mul i32 %u, 3 %s = sext i32 %t to i64 ret i64 %s } => define i64 @test6(i32 %x) { %0: %u = lshr i32 %x, 3 %t = mul nsw nuw i32 %u, 3 %s = zext i32 %t to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i64 @test7(i32 %x) { %0: %t = and i32 %x, 511 %u = sub i32 20000, %t %s = sext i32 %u to i64 ret i64 %s } => define i64 @test7(i32 %x) { %0: %t = and i32 %x, 511 %u = sub nsw nuw i32 20000, %t %s = zext i32 %u to i64 ret i64 %s } Transformation seems to be correct! ---------------------------------------- define i32 @test8(i8 %a, i32 %f, i1 %p, * %z) { %0: %d = lshr i32 %f, 24 %e = select i1 %p, i32 %d, i32 0 %s = trunc i32 %e to i16 %n = sext i16 %s to i32 ret i32 %n } => define i32 @test8(i8 %a, i32 %f, i1 %p, * %z) { %0: %d = lshr i32 %f, 24 %n = select i1 %p, i32 %d, i32 0 ret i32 %n } Transformation seems to be correct! ---------------------------------------- define i16 @test9(i16 %t, i1 %cond) { %entry: br i1 %cond, label %TBB, label %FBB %TBB: %t2 = sext i16 %t to i32 br label %FBB %FBB: %V = phi i32 [ %t2, %TBB ], [ 42, %entry ] %W = trunc i32 %V to i16 ret i16 %W } => define i16 @test9(i16 %t, i1 %cond) { %entry: br i1 %cond, label %TBB, label %FBB %TBB: br label %FBB %FBB: %V.off0 = phi i16 [ %t, %TBB ], [ 42, %entry ] ret i16 %V.off0 } Transformation seems to be correct! ---------------------------------------- define i32 @test10(i32 %i) { %0: %A = trunc i32 %i to i8 %B = shl i8 %A, 6 %C = ashr i8 %B, 6 %D = sext i8 %C to i32 ret i32 %D } => define i32 @test10(i32 %i) { %0: %D1 = shl i32 %i, 30 %D = ashr exact i32 %D1, 30 ret i32 %D } Transformation seems to be correct! ---------------------------------------- define <2 x i32> @test10_vec(<2 x i32> %i) { %0: %A = trunc <2 x i32> %i to <2 x i8> %B = shl <2 x i8> %A, { 6, 6 } %C = ashr <2 x i8> %B, { 6, 6 } %D = sext <2 x i8> %C to <2 x i32> ret <2 x i32> %D } => define <2 x i32> @test10_vec(<2 x i32> %i) { %0: %D1 = shl <2 x i32> %i, { 30, 30 } %D = ashr exact <2 x i32> %D1, { 30, 30 } ret <2 x i32> %D } Transformation seems to be correct! ---------------------------------------- define <2 x i32> @test10_vec_nonuniform(<2 x i32> %i) { %0: %A = trunc <2 x i32> %i to <2 x i8> %B = shl <2 x i8> %A, { 6, 3 } %C = ashr <2 x i8> %B, { 6, 3 } %D = sext <2 x i8> %C to <2 x i32> ret <2 x i32> %D } => define <2 x i32> @test10_vec_nonuniform(<2 x i32> %i) { %0: %D1 = shl <2 x i32> %i, { 30, 27 } %D = ashr <2 x i32> %D1, { 30, 27 } ret <2 x i32> %D } Transformation seems to be correct! ---------------------------------------- define <2 x i32> @test10_vec_undef0(<2 x i32> %i) { %0: %A = trunc <2 x i32> %i to <2 x i8> %B = shl <2 x i8> %A, { 6, 0 } %C = ashr <2 x i8> %B, { 6, undef } %D = sext <2 x i8> %C to <2 x i32> ret <2 x i32> %D } => define <2 x i32> @test10_vec_undef0(<2 x i32> %i) { %0: %D1 = shl <2 x i32> %i, { 30, undef } %D = ashr <2 x i32> %D1, { 30, undef } ret <2 x i32> %D } Transformation seems to be correct! ---------------------------------------- define <2 x i32> @test10_vec_undef1(<2 x i32> %i) { %0: %A = trunc <2 x i32> %i to <2 x i8> %B = shl <2 x i8> %A, { 6, undef } %C = ashr <2 x i8> %B, { 6, 0 } %D = sext <2 x i8> %C to <2 x i32> ret <2 x i32> %D } => define <2 x i32> @test10_vec_undef1(<2 x i32> %i) { %0: %D1 = shl <2 x i32> %i, { 30, undef } %D = ashr <2 x i32> %D1, { 30, undef } ret <2 x i32> %D } Transformation seems to be correct! ---------------------------------------- define <2 x i32> @test10_vec_undef2(<2 x i32> %i) { %0: %A = trunc <2 x i32> %i to <2 x i8> %B = shl <2 x i8> %A, { 6, undef } %C = ashr <2 x i8> %B, { 6, undef } %D = sext <2 x i8> %C to <2 x i32> ret <2 x i32> %D } => define <2 x i32> @test10_vec_undef2(<2 x i32> %i) { %0: %D1 = shl <2 x i32> %i, { 30, undef } %D = ashr <2 x i32> %D1, { 30, undef } ret <2 x i32> %D } Transformation seems to be correct! ---------------------------------------- define void @test11(<2 x i16> %srcA, <2 x i16> %srcB, * %dst) { %0: %cmp = icmp eq <2 x i16> %srcB, %srcA %sext = sext <2 x i1> %cmp to <2 x i16> %tmask = ashr <2 x i16> %sext, { 15, 15 } store <2 x i16> %tmask, * %dst, align 4 ret void } => define void @test11(<2 x i16> %srcA, <2 x i16> %srcB, * %dst) { %0: %cmp = icmp eq <2 x i16> %srcB, %srcA %sext = sext <2 x i1> %cmp to <2 x i16> store <2 x i16> %sext, * %dst, align 4 ret void } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @test13(i32 %x) { %0: %and = and i32 %x, 8 %cmp = icmp eq i32 %and, 0 %ext = sext i1 %cmp to i32 ret i32 %ext } => define i32 @test13(i32 %x) { %0: %and = lshr i32 %x, 3 %1 = and i32 %and, 1 %sext = add nsw i32 %1, 4294967295 ret i32 %sext } Transformation seems to be correct! ---------------------------------------- define i32 @test14(i16 %x) { %0: %and = and i16 %x, 16 %cmp = icmp ne i16 %and, 16 %ext = sext i1 %cmp to i32 ret i32 %ext } => define i32 @test14(i16 %x) { %0: %and = lshr i16 %x, 4 %1 = and i16 %and, 1 %sext = add nsw i16 %1, 65535 %ext = sext i16 %sext to i32 ret i32 %ext } Transformation seems to be correct! ---------------------------------------- define i32 @test15(i32 %x) { %0: %and = and i32 %x, 16 %cmp = icmp ne i32 %and, 0 %ext = sext i1 %cmp to i32 ret i32 %ext } => define i32 @test15(i32 %x) { %0: %and = shl i32 %x, 27 %sext = ashr i32 %and, 31 ret i32 %sext } Transformation seems to be correct! ---------------------------------------- define i32 @test16(i16 %x) { %0: %and = and i16 %x, 8 %cmp = icmp eq i16 %and, 8 %ext = sext i1 %cmp to i32 ret i32 %ext } => define i32 @test16(i16 %x) { %0: %and = shl i16 %x, 12 %sext = ashr i16 %and, 15 %ext = sext i16 %sext to i32 ret i32 %ext } Transformation seems to be correct! ---------------------------------------- define i32 @test17(i1 %x) { %0: %c1 = sext i1 %x to i32 %c2 = sub i32 0, %c1 ret i32 %c2 } => define i32 @test17(i1 %x) { %0: %c1.neg = zext i1 %x to i32 ret i32 %c1.neg } Transformation seems to be correct! ---------------------------------------- define i32 @test18(i16 %x) { %0: %cmp = icmp slt i16 %x, 0 %sel = select i1 %cmp, i16 0, i16 %x %ext = sext i16 %sel to i32 ret i32 %ext } => define i32 @test18(i16 %x) { %0: %1 = icmp sgt i16 %x, 0 %sel = select i1 %1, i16 %x, i16 0 %ext = zext i16 %sel to i32 ret i32 %ext } Transformation doesn't verify! ERROR: Value mismatch Example: i16 %x = undef Source: i1 %cmp = any i16 %sel = any i32 %ext = #x00000000 (0) [based on undef value] Target: i1 %1 = #x1 (1) i16 %sel = #x8000 (32768, -32768) i32 %ext = #x00008000 (32768) Source value: #x00000000 (0) Target value: #x00008000 (32768) ------------------- SMT STATS ------------------- Num queries: 85 Num invalid: 0 Num skips: 0 Num trivial: 79 (48.2%) Num timeout: 2 (2.4%) Num errors: 0 (0.0%) Num SAT: 24 (28.2%) Num UNSAT: 59 (69.4%) Alive2: Transform doesn't verify; aborting!
+ : 'RUN: at line 2' + /home/nlopes/alive2/build/opt-alive.sh -instcombine -S + /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/sext.ll FileCheck error: '<stdin>' is empty. FileCheck command line: /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/sext.ll
NOTE: This test would pass if undef didn't exist!