Test Failure: Transforms/InstCombine/vector-urem.ll

Test source: git

Log:

Source: <stdin>

----------------------------------------
define <4 x i32> @test_v4i32_splatconst_pow2(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> %a0, { 2, 2, 2, 2 }
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_splatconst_pow2(<4 x i32> %a0) {
%0:
  %1 = and <4 x i32> %a0, { 1, 1, 1, 1 }
  ret <4 x i32> %1
}
Transformation seems to be correct!


----------------------------------------
define <4 x i32> @test_v4i32_const_pow2(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> %a0, { 1, 2, 4, 8 }
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_const_pow2(<4 x i32> %a0) {
%0:
  %1 = and <4 x i32> %a0, { 0, 1, 3, 7 }
  ret <4 x i32> %1
}
Transformation seems to be correct!


----------------------------------------
define <4 x i32> @test_v4i32_const_pow2_undef(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> %a0, { 1, 2, 4, undef }
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_const_pow2_undef(<4 x i32> %a0) {
%0:
  ret <4 x i32> undef
}
Transformation seems to be correct!


----------------------------------------
define <4 x i32> @test_v4i32_one(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> { 1, 1, 1, 1 }, %a0
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_one(<4 x i32> %a0) {
%0:
  %1 = icmp ne <4 x i32> %a0, { 1, 1, 1, 1 }
  %2 = zext <4 x i1> %1 to <4 x i32>
  ret <4 x i32> %2
}
Transformation seems to be correct!


----------------------------------------
define <4 x i32> @test_v4i32_one_undef(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> { 1, 1, 1, undef }, %a0
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_one_undef(<4 x i32> %a0) {
%0:
  %1 = icmp ne <4 x i32> %a0, { 1, 1, 1, 1 }
  %2 = zext <4 x i1> %1 to <4 x i32>
  ret <4 x i32> %2
}
Transformation seems to be correct!


----------------------------------------
define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) {
%0:
  %1 = urem <4 x i32> %a0, { 4294967293, 4294967293, 4294967293, 4294967293 }
  ret <4 x i32> %1
}
=>
define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) {
%0:
  %1 = icmp ult <4 x i32> %a0, { 4294967293, 4294967293, 4294967293, 4294967293 }
  %2 = add <4 x i32> %a0, { 3, 3, 3, 3 }
  %3 = select <4 x i1> %1, <4 x i32> %a0, <4 x i32> %2
  ret <4 x i32> %3
}
Transformation doesn't verify!
ERROR: Value mismatch

Example:
<4 x i32> %a0 = < undef, undef, undef, undef >

Source:
<4 x i32> %1 = < #x00000000 (0)	[based on undef value], #x00000000 (0), #x00000000 (0), #x00000000 (0) >

Target:
<4 x i1> %1 = < #x0 (0), #x0 (0), #x0 (0), #x0 (0) >
<4 x i32> %2 = < #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3) >
<4 x i32> %3 = < #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3) >
Source value: < #x00000000 (0), #x00000000 (0), #x00000000 (0), #x00000000 (0) >
Target value: < #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3), #xfffffffd (4294967293, -3) >


------------------- SMT STATS -------------------
Num queries: 16
Num invalid: 0
Num skips:   0
Num trivial: 20 (55.6%)
Num timeout: 0 (0.0%)
Num errors:  0 (0.0%)
Num SAT:     8 (50.0%)
Num UNSAT:   8 (50.0%)

stderr:

+ : 'RUN: at line 2'
+ /home/nlopes/alive2/scripts/opt-alive.sh -instcombine -S
+ /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/vector-urem.ll

Alive2: Transform doesn't verify; aborting!
FileCheck error: '<stdin>' is empty.
FileCheck command line:  /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/vector-urem.ll

NOTE: This test would pass if undef didn't exist!

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