Test source: git
Source: <stdin> ---------------------------------------- define i16 @sel_sext_constants(i1 %cmp) { %0: %sel = select i1 %cmp, i8 255, i8 42 %ext = sext i8 %sel to i16 ret i16 %ext } => define i16 @sel_sext_constants(i1 %cmp) { %0: %ext = select i1 %cmp, i16 65535, i16 42 ret i16 %ext } Transformation seems to be correct! ---------------------------------------- define i16 @sel_zext_constants(i1 %cmp) { %0: %sel = select i1 %cmp, i8 255, i8 42 %ext = zext i8 %sel to i16 ret i16 %ext } => define i16 @sel_zext_constants(i1 %cmp) { %0: %ext = select i1 %cmp, i16 255, i16 42 ret i16 %ext } Transformation seems to be correct! ---------------------------------------- define double @sel_fpext_constants(i1 %cmp) { %0: %sel = select i1 %cmp, float -255.000000, float 42.000000 %ext = fpext float %sel to double ret double %ext } => define double @sel_fpext_constants(i1 %cmp) { %0: %ext = select i1 %cmp, double -255.000000, double 42.000000 ret double %ext } Transformation seems to be correct! ---------------------------------------- define i64 @sel_sext(i32 %a, i1 %cmp) { %0: %sel = select i1 %cmp, i32 %a, i32 42 %ext = sext i32 %sel to i64 ret i64 %ext } => define i64 @sel_sext(i32 %a, i1 %cmp) { %0: %1 = sext i32 %a to i64 %ext = select i1 %cmp, i64 %1, i64 42 ret i64 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) { %0: %sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> { 42, 42, 42, 42 } %ext = sext <4 x i32> %sel to <4 x i64> ret <4 x i64> %ext } => define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) { %0: %1 = sext <4 x i32> %a to <4 x i64> %ext = select <4 x i1> %cmp, <4 x i64> %1, <4 x i64> { 42, 42, 42, 42 } ret <4 x i64> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i64 @sel_zext(i32 %a, i1 %cmp) { %0: %sel = select i1 %cmp, i32 %a, i32 42 %ext = zext i32 %sel to i64 ret i64 %ext } => define i64 @sel_zext(i32 %a, i1 %cmp) { %0: %1 = zext i32 %a to i64 %ext = select i1 %cmp, i64 %1, i64 42 ret i64 %ext } Transformation seems to be correct! ---------------------------------------- define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) { %0: %sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> { 42, 42, 42, 42 } %ext = zext <4 x i32> %sel to <4 x i64> ret <4 x i64> %ext } => define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) { %0: %1 = zext <4 x i32> %a to <4 x i64> %ext = select <4 x i1> %cmp, <4 x i64> %1, <4 x i64> { 42, 42, 42, 42 } ret <4 x i64> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) { %0: %trunc = trunc i32 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = sext i16 %sel to i64 ret i64 %ext } => define i64 @trunc_sel_larger_sext(i32 %a, i1 %cmp) { %0: %trunc = trunc i32 %a to i16 %1 = sext i16 %trunc to i64 %ext = select i1 %cmp, i64 %1, i64 42 ret i64 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i32> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = sext <2 x i16> %sel to <2 x i64> ret <2 x i64> %ext } => define <2 x i64> @trunc_sel_larger_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i32> %a to <2 x i16> %1 = sext <2 x i16> %trunc to <2 x i64> %ext = select <2 x i1> %cmp, <2 x i64> %1, <2 x i64> { 42, 43 } ret <2 x i64> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) { %0: %trunc = trunc i64 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = sext i16 %sel to i32 ret i32 %ext } => define i32 @trunc_sel_smaller_sext(i64 %a, i1 %cmp) { %0: %trunc = trunc i64 %a to i16 %1 = sext i16 %trunc to i32 %ext = select i1 %cmp, i32 %1, i32 42 ret i32 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i64> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = sext <2 x i16> %sel to <2 x i32> ret <2 x i32> %ext } => define <2 x i32> @trunc_sel_smaller_sext_vec(<2 x i64> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i64> %a to <2 x i16> %1 = sext <2 x i16> %trunc to <2 x i32> %ext = select <2 x i1> %cmp, <2 x i32> %1, <2 x i32> { 42, 43 } ret <2 x i32> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) { %0: %trunc = trunc i32 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = sext i16 %sel to i32 ret i32 %ext } => define i32 @trunc_sel_equal_sext(i32 %a, i1 %cmp) { %0: %1 = shl i32 %a, 16 %2 = ashr exact i32 %1, 16 %ext = select i1 %cmp, i32 %2, i32 42 ret i32 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i32> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = sext <2 x i16> %sel to <2 x i32> ret <2 x i32> %ext } => define <2 x i32> @trunc_sel_equal_sext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %1 = shl <2 x i32> %a, { 16, 16 } %2 = ashr exact <2 x i32> %1, { 16, 16 } %ext = select <2 x i1> %cmp, <2 x i32> %2, <2 x i32> { 42, 43 } ret <2 x i32> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) { %0: %trunc = trunc i32 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = zext i16 %sel to i64 ret i64 %ext } => define i64 @trunc_sel_larger_zext(i32 %a, i1 %cmp) { %0: %trunc.mask = and i32 %a, 65535 %1 = zext i32 %trunc.mask to i64 %ext = select i1 %cmp, i64 %1, i64 42 ret i64 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i32> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = zext <2 x i16> %sel to <2 x i64> ret <2 x i64> %ext } => define <2 x i64> @trunc_sel_larger_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc.mask = and <2 x i32> %a, { 65535, 65535 } %1 = zext <2 x i32> %trunc.mask to <2 x i64> %ext = select <2 x i1> %cmp, <2 x i64> %1, <2 x i64> { 42, 43 } ret <2 x i64> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) { %0: %trunc = trunc i64 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = zext i16 %sel to i32 ret i32 %ext } => define i32 @trunc_sel_smaller_zext(i64 %a, i1 %cmp) { %0: %1 = trunc i64 %a to i32 %2 = and i32 %1, 65535 %ext = select i1 %cmp, i32 %2, i32 42 ret i32 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i64> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = zext <2 x i16> %sel to <2 x i32> ret <2 x i32> %ext } => define <2 x i32> @trunc_sel_smaller_zext_vec(<2 x i64> %a, <2 x i1> %cmp) { %0: %1 = trunc <2 x i64> %a to <2 x i32> %2 = and <2 x i32> %1, { 65535, 65535 } %ext = select <2 x i1> %cmp, <2 x i32> %2, <2 x i32> { 42, 43 } ret <2 x i32> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) { %0: %trunc = trunc i32 %a to i16 %sel = select i1 %cmp, i16 %trunc, i16 42 %ext = zext i16 %sel to i32 ret i32 %ext } => define i32 @trunc_sel_equal_zext(i32 %a, i1 %cmp) { %0: %1 = and i32 %a, 65535 %ext = select i1 %cmp, i32 %1, i32 42 ret i32 %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %trunc = trunc <2 x i32> %a to <2 x i16> %sel = select <2 x i1> %cmp, <2 x i16> %trunc, <2 x i16> { 42, 43 } %ext = zext <2 x i16> %sel to <2 x i32> ret <2 x i32> %ext } => define <2 x i32> @trunc_sel_equal_zext_vec(<2 x i32> %a, <2 x i1> %cmp) { %0: %1 = and <2 x i32> %a, { 65535, 65535 } %ext = select <2 x i1> %cmp, <2 x i32> %1, <2 x i32> { 42, 43 } ret <2 x i32> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define double @trunc_sel_larger_fpext(float %a, i1 %cmp) { %0: %trunc = fptrunc float %a to half %sel = select i1 %cmp, half %trunc, half 20800 %ext = fpext half %sel to double ret double %ext } => define double @trunc_sel_larger_fpext(float %a, i1 %cmp) { %0: %trunc = fptrunc float %a to half %1 = fpext half %trunc to double %ext = select i1 %cmp, double %1, double 42.000000 ret double %ext } Transformation seems to be correct! ---------------------------------------- define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x float> %a to <2 x half> %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> { 20800, 20832 } %ext = fpext <2 x half> %sel to <2 x double> ret <2 x double> %ext } => define <2 x double> @trunc_sel_larger_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x float> %a to <2 x half> %1 = fpext <2 x half> %trunc to <2 x double> %ext = select <2 x i1> %cmp, <2 x double> %1, <2 x double> { 42.000000, 43.000000 } ret <2 x double> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) { %0: %trunc = fptrunc double %a to half %sel = select i1 %cmp, half %trunc, half 20800 %ext = fpext half %sel to float ret float %ext } => define float @trunc_sel_smaller_fpext(double %a, i1 %cmp) { %0: %trunc = fptrunc double %a to half %1 = fpext half %trunc to float %ext = select i1 %cmp, float %1, float 42.000000 ret float %ext } Transformation seems to be correct! ---------------------------------------- define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x double> %a to <2 x half> %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> { 20800, 20832 } %ext = fpext <2 x half> %sel to <2 x float> ret <2 x float> %ext } => define <2 x float> @trunc_sel_smaller_fpext_vec(<2 x double> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x double> %a to <2 x half> %1 = fpext <2 x half> %trunc to <2 x float> %ext = select <2 x i1> %cmp, <2 x float> %1, <2 x float> { 42.000000, 43.000000 } ret <2 x float> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define float @trunc_sel_equal_fpext(float %a, i1 %cmp) { %0: %trunc = fptrunc float %a to half %sel = select i1 %cmp, half %trunc, half 20800 %ext = fpext half %sel to float ret float %ext } => define float @trunc_sel_equal_fpext(float %a, i1 %cmp) { %0: %trunc = fptrunc float %a to half %1 = fpext half %trunc to float %ext = select i1 %cmp, float %1, float 42.000000 ret float %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x float> %a to <2 x half> %sel = select <2 x i1> %cmp, <2 x half> %trunc, <2 x half> { 20800, 20832 } %ext = fpext <2 x half> %sel to <2 x float> ret <2 x float> %ext } => define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) { %0: %trunc = fptrunc <2 x float> %a to <2 x half> %1 = fpext <2 x half> %trunc to <2 x float> %ext = select <2 x i1> %cmp, <2 x float> %1, <2 x float> { 42.000000, 43.000000 } ret <2 x float> %ext } Transformation doesn't verify! ERROR: Timeout ---------------------------------------- define i32 @test_sext1(i1 %cca, i1 %ccb) { %0: %ccax = sext i1 %cca to i32 %r = select i1 %ccb, i32 %ccax, i32 0 ret i32 %r } => define i32 @test_sext1(i1 %cca, i1 %ccb) { %0: %narrow = and i1 %ccb, %cca %r = sext i1 %narrow to i32 ret i32 %r } Transformation doesn't verify! ERROR: Target is more poisonous than source Example: i1 %cca = poison i1 %ccb = #x0 (0) Source: i32 %ccax = poison i32 %r = #x00000000 (0) Target: i1 %narrow = poison i32 %r = poison Source value: #x00000000 (0) Target value: poison ------------------- SMT STATS ------------------- Num queries: 74 Num invalid: 0 Num skips: 0 Num trivial: 61 (45.2%) Num timeout: 19 (25.7%) Num errors: 0 (0.0%) Num SAT: 27 (36.5%) Num UNSAT: 28 (37.8%)
+ : 'RUN: at line 2' + /home/nlopes/alive2/scripts/opt-alive.sh -instcombine -S + /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/select-bitext.ll Alive2: Transform doesn't verify; aborting! FileCheck error: '<stdin>' is empty. FileCheck command line: /home/nlopes/llvm/build/bin/FileCheck /home/nlopes/llvm/llvm/test/Transforms/InstCombine/select-bitext.ll