Test Failure: Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll

Test source: git

Log:

Source: <stdin>
-- 1. ModuleToFunctionPassAdaptor
-- 1. PassManager<Function> : Skipping NOP
-- 2. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 3. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrai_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 4. PassManager<Function> : Skipping NOP
-- 5. PassManager<Function> : Skipping NOP
-- 6. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 7. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrai_w_15(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 8. PassManager<Function> : Skipping NOP
-- 9. PassManager<Function> : Skipping NOP
-- 10. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 11. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrai_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrai_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrai_w_64(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 12. PassManager<Function> : Skipping NOP
-- 13. PassManager<Function> : Skipping NOP
-- 14. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 15. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrai_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 16. PassManager<Function> : Skipping NOP
-- 17. PassManager<Function> : Skipping NOP
-- 18. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 19. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrai_d_15(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 20. PassManager<Function> : Skipping NOP
-- 21. PassManager<Function> : Skipping NOP
-- 22. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 23. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrai_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrai_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrai_d_64(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 31, 31, 31, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 24. PassManager<Function> : Skipping NOP
-- 25. PassManager<Function> : Skipping NOP
-- 26. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 27. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrai_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 28. PassManager<Function> : Skipping NOP
-- 29. PassManager<Function> : Skipping NOP
-- 30. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 31. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrai_w_15(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 32. PassManager<Function> : Skipping NOP
-- 33. PassManager<Function> : Skipping NOP
-- 34. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 35. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrai_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrai_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrai_w_64(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 36. PassManager<Function> : Skipping NOP
-- 37. PassManager<Function> : Skipping NOP
-- 38. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 39. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrai_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 40. PassManager<Function> : Skipping NOP
-- 41. PassManager<Function> : Skipping NOP
-- 42. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 43. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrai_d_15(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 44. PassManager<Function> : Skipping NOP
-- 45. PassManager<Function> : Skipping NOP
-- 46. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 47. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrai_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrai_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrai_d_64(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 48. PassManager<Function> : Skipping NOP
-- 49. PassManager<Function> : Skipping NOP
-- 50. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 51. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrai_q_128_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 52. PassManager<Function> : Skipping NOP
-- 53. PassManager<Function> : Skipping NOP
-- 54. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_15(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 55. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_15(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrai_q_128_15(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 56. PassManager<Function> : Skipping NOP
-- 57. PassManager<Function> : Skipping NOP
-- 58. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_64(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 59. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrai_q_128_64(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_128 <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrai_q_128_64(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 63, 63 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 60. PassManager<Function> : Skipping NOP
-- 61. PassManager<Function> : Skipping NOP
-- 62. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 63. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrai_q_256_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 64. PassManager<Function> : Skipping NOP
-- 65. PassManager<Function> : Skipping NOP
-- 66. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 67. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrai_q_256_15(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 68. PassManager<Function> : Skipping NOP
-- 69. PassManager<Function> : Skipping NOP
-- 70. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 71. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrai_q_256_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_256 <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrai_q_256_64(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 63, 63, 63, 63 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 72. PassManager<Function> : Skipping NOP
-- 73. PassManager<Function> : Skipping NOP
-- 74. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 75. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrai_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 76. PassManager<Function> : Skipping NOP
-- 77. PassManager<Function> : Skipping NOP
-- 78. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 79. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrai_w_512_15(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 80. PassManager<Function> : Skipping NOP
-- 81. PassManager<Function> : Skipping NOP
-- 82. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 83. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrai_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrai_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrai_w_512_64(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 84. PassManager<Function> : Skipping NOP
-- 85. PassManager<Function> : Skipping NOP
-- 86. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 87. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrai_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 88. PassManager<Function> : Skipping NOP
-- 89. PassManager<Function> : Skipping NOP
-- 90. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 91. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrai_d_512_15(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 92. PassManager<Function> : Skipping NOP
-- 93. PassManager<Function> : Skipping NOP
-- 94. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 95. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrai_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrai_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrai_d_512_64(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 96. PassManager<Function> : Skipping NOP
-- 97. PassManager<Function> : Skipping NOP
-- 98. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 99. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrai_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 100. PassManager<Function> : Skipping NOP
-- 101. PassManager<Function> : Skipping NOP
-- 102. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 103. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrai_q_512_15(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 104. PassManager<Function> : Skipping NOP
-- 105. PassManager<Function> : Skipping NOP
-- 106. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 107. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrai_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrai_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrai_q_512_64(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 63, 63, 63, 63, 63, 63, 63, 63 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 108. PassManager<Function> : Skipping NOP
-- 109. PassManager<Function> : Skipping NOP
-- 110. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 111. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrli_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 112. PassManager<Function> : Skipping NOP
-- 113. PassManager<Function> : Skipping NOP
-- 114. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 115. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrli_w_15(<8 x i16> %v) {
#0:
  %#1 = lshr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 116. PassManager<Function> : Skipping NOP
-- 117. PassManager<Function> : Skipping NOP
-- 118. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 119. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrli_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrli_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrli_w_64(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 120. PassManager<Function> : Skipping NOP
-- 121. PassManager<Function> : Skipping NOP
-- 122. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 123. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrli_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 124. PassManager<Function> : Skipping NOP
-- 125. PassManager<Function> : Skipping NOP
-- 126. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 127. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrli_d_15(<4 x i32> %v) {
#0:
  %#1 = lshr <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 128. PassManager<Function> : Skipping NOP
-- 129. PassManager<Function> : Skipping NOP
-- 130. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 131. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrli_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrli_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrli_d_64(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 132. PassManager<Function> : Skipping NOP
-- 133. PassManager<Function> : Skipping NOP
-- 134. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 135. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrli_q_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 136. PassManager<Function> : Skipping NOP
-- 137. PassManager<Function> : Skipping NOP
-- 138. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 139. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrli_q_15(<2 x i64> %v) {
#0:
  %#1 = lshr <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 140. PassManager<Function> : Skipping NOP
-- 141. PassManager<Function> : Skipping NOP
-- 142. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 143. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrli_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrli_q <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrli_q_64(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 144. PassManager<Function> : Skipping NOP
-- 145. PassManager<Function> : Skipping NOP
-- 146. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 147. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrli_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 148. PassManager<Function> : Skipping NOP
-- 149. PassManager<Function> : Skipping NOP
-- 150. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 151. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrli_w_15(<16 x i16> %v) {
#0:
  %#1 = lshr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 152. PassManager<Function> : Skipping NOP
-- 153. PassManager<Function> : Skipping NOP
-- 154. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 155. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrli_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrli_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrli_w_64(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 156. PassManager<Function> : Skipping NOP
-- 157. PassManager<Function> : Skipping NOP
-- 158. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 159. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrli_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 160. PassManager<Function> : Skipping NOP
-- 161. PassManager<Function> : Skipping NOP
-- 162. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 163. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrli_d_15(<8 x i32> %v) {
#0:
  %#1 = lshr <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 164. PassManager<Function> : Skipping NOP
-- 165. PassManager<Function> : Skipping NOP
-- 166. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 167. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrli_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrli_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrli_d_64(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 168. PassManager<Function> : Skipping NOP
-- 169. PassManager<Function> : Skipping NOP
-- 170. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 171. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrli_q_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 172. PassManager<Function> : Skipping NOP
-- 173. PassManager<Function> : Skipping NOP
-- 174. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 175. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrli_q_15(<4 x i64> %v) {
#0:
  %#1 = lshr <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 176. PassManager<Function> : Skipping NOP
-- 177. PassManager<Function> : Skipping NOP
-- 178. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 179. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrli_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrli_q <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrli_q_64(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 180. PassManager<Function> : Skipping NOP
-- 181. PassManager<Function> : Skipping NOP
-- 182. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 183. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrli_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 184. PassManager<Function> : Skipping NOP
-- 185. PassManager<Function> : Skipping NOP
-- 186. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 187. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = lshr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 188. PassManager<Function> : Skipping NOP
-- 189. PassManager<Function> : Skipping NOP
-- 190. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 191. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrli_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrli_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrli_w_512_64(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 192. PassManager<Function> : Skipping NOP
-- 193. PassManager<Function> : Skipping NOP
-- 194. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 195. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrli_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 196. PassManager<Function> : Skipping NOP
-- 197. PassManager<Function> : Skipping NOP
-- 198. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 199. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = lshr <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 200. PassManager<Function> : Skipping NOP
-- 201. PassManager<Function> : Skipping NOP
-- 202. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 203. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrli_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrli_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrli_d_512_64(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 204. PassManager<Function> : Skipping NOP
-- 205. PassManager<Function> : Skipping NOP
-- 206. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 207. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrli_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 208. PassManager<Function> : Skipping NOP
-- 209. PassManager<Function> : Skipping NOP
-- 210. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 211. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = lshr <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 212. PassManager<Function> : Skipping NOP
-- 213. PassManager<Function> : Skipping NOP
-- 214. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 215. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrli_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrli_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrli_q_512_64(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 216. PassManager<Function> : Skipping NOP
-- 217. PassManager<Function> : Skipping NOP
-- 218. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 219. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 0
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_pslli_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 220. PassManager<Function> : Skipping NOP
-- 221. PassManager<Function> : Skipping NOP
-- 222. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 223. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 15
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_pslli_w_15(<8 x i16> %v) {
#0:
  %#1 = shl <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 224. PassManager<Function> : Skipping NOP
-- 225. PassManager<Function> : Skipping NOP
-- 226. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 227. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_pslli_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_pslli_w <8 x i16> %v, i32 64
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_pslli_w_64(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 228. PassManager<Function> : Skipping NOP
-- 229. PassManager<Function> : Skipping NOP
-- 230. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 231. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 0
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_pslli_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 232. PassManager<Function> : Skipping NOP
-- 233. PassManager<Function> : Skipping NOP
-- 234. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 235. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 15
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_pslli_d_15(<4 x i32> %v) {
#0:
  %#1 = shl <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 236. PassManager<Function> : Skipping NOP
-- 237. PassManager<Function> : Skipping NOP
-- 238. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 239. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_pslli_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_pslli_d <4 x i32> %v, i32 64
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_pslli_d_64(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 240. PassManager<Function> : Skipping NOP
-- 241. PassManager<Function> : Skipping NOP
-- 242. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 243. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 0
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_pslli_q_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 244. PassManager<Function> : Skipping NOP
-- 245. PassManager<Function> : Skipping NOP
-- 246. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 247. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 15
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_pslli_q_15(<2 x i64> %v) {
#0:
  %#1 = shl <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 248. PassManager<Function> : Skipping NOP
-- 249. PassManager<Function> : Skipping NOP
-- 250. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 251. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_pslli_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_pslli_q <2 x i64> %v, i32 64
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_pslli_q_64(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 252. PassManager<Function> : Skipping NOP
-- 253. PassManager<Function> : Skipping NOP
-- 254. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 255. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 0
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_pslli_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 256. PassManager<Function> : Skipping NOP
-- 257. PassManager<Function> : Skipping NOP
-- 258. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 259. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 15
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_pslli_w_15(<16 x i16> %v) {
#0:
  %#1 = shl <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 260. PassManager<Function> : Skipping NOP
-- 261. PassManager<Function> : Skipping NOP
-- 262. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 263. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_pslli_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_pslli_w <16 x i16> %v, i32 64
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_pslli_w_64(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 264. PassManager<Function> : Skipping NOP
-- 265. PassManager<Function> : Skipping NOP
-- 266. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 267. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 0
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_pslli_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 268. PassManager<Function> : Skipping NOP
-- 269. PassManager<Function> : Skipping NOP
-- 270. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 271. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 15
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_pslli_d_15(<8 x i32> %v) {
#0:
  %#1 = shl <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 272. PassManager<Function> : Skipping NOP
-- 273. PassManager<Function> : Skipping NOP
-- 274. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 275. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_pslli_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_pslli_d <8 x i32> %v, i32 64
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_pslli_d_64(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 276. PassManager<Function> : Skipping NOP
-- 277. PassManager<Function> : Skipping NOP
-- 278. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 279. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 0
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_pslli_q_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 280. PassManager<Function> : Skipping NOP
-- 281. PassManager<Function> : Skipping NOP
-- 282. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 283. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 15
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_pslli_q_15(<4 x i64> %v) {
#0:
  %#1 = shl <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 284. PassManager<Function> : Skipping NOP
-- 285. PassManager<Function> : Skipping NOP
-- 286. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 287. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_pslli_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_pslli_q <4 x i64> %v, i32 64
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_pslli_q_64(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 288. PassManager<Function> : Skipping NOP
-- 289. PassManager<Function> : Skipping NOP
-- 290. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 291. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 0
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_pslli_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 292. PassManager<Function> : Skipping NOP
-- 293. PassManager<Function> : Skipping NOP
-- 294. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 295. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 15
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_pslli_w_512_15(<32 x i16> %v) {
#0:
  %#1 = shl <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 296. PassManager<Function> : Skipping NOP
-- 297. PassManager<Function> : Skipping NOP
-- 298. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 299. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_pslli_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_pslli_w_512 <32 x i16> %v, i32 64
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_pslli_w_512_64(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 300. PassManager<Function> : Skipping NOP
-- 301. PassManager<Function> : Skipping NOP
-- 302. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 303. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 0
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_pslli_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 304. PassManager<Function> : Skipping NOP
-- 305. PassManager<Function> : Skipping NOP
-- 306. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 307. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 15
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_pslli_d_512_15(<16 x i32> %v) {
#0:
  %#1 = shl <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 308. PassManager<Function> : Skipping NOP
-- 309. PassManager<Function> : Skipping NOP
-- 310. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 311. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_pslli_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_pslli_d_512 <16 x i32> %v, i32 64
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_pslli_d_512_64(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 312. PassManager<Function> : Skipping NOP
-- 313. PassManager<Function> : Skipping NOP
-- 314. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 315. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 0
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_pslli_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 316. PassManager<Function> : Skipping NOP
-- 317. PassManager<Function> : Skipping NOP
-- 318. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 319. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 15
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_pslli_q_512_15(<8 x i64> %v) {
#0:
  %#1 = shl <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 320. PassManager<Function> : Skipping NOP
-- 321. PassManager<Function> : Skipping NOP
-- 322. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 323. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_pslli_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_pslli_q_512 <8 x i64> %v, i32 64
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_pslli_q_512_64(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 324. PassManager<Function> : Skipping NOP
-- 325. PassManager<Function> : Skipping NOP
-- 326. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 327. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psra_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 328. PassManager<Function> : Skipping NOP
-- 329. PassManager<Function> : Skipping NOP
-- 330. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 331. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psra_w_15(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 332. PassManager<Function> : Skipping NOP
-- 333. PassManager<Function> : Skipping NOP
-- 334. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 335. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psra_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 336. PassManager<Function> : Skipping NOP
-- 337. PassManager<Function> : Skipping NOP
-- 338. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 339. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psra_w_64(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 340. PassManager<Function> : Skipping NOP
-- 341. PassManager<Function> : Skipping NOP
-- 342. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 343. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psra_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 344. PassManager<Function> : Skipping NOP
-- 345. PassManager<Function> : Skipping NOP
-- 346. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 347. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psra_d_15(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 348. PassManager<Function> : Skipping NOP
-- 349. PassManager<Function> : Skipping NOP
-- 350. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 351. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psra_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 31, 31, 31, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 352. PassManager<Function> : Skipping NOP
-- 353. PassManager<Function> : Skipping NOP
-- 354. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 355. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psra_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psra_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psra_d_64(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 31, 31, 31, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 356. PassManager<Function> : Skipping NOP
-- 357. PassManager<Function> : Skipping NOP
-- 358. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 359. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psra_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 360. PassManager<Function> : Skipping NOP
-- 361. PassManager<Function> : Skipping NOP
-- 362. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 363. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psra_w_15(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 364. PassManager<Function> : Skipping NOP
-- 365. PassManager<Function> : Skipping NOP
-- 366. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 367. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psra_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 368. PassManager<Function> : Skipping NOP
-- 369. PassManager<Function> : Skipping NOP
-- 370. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 371. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psra_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psra_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psra_w_64(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 372. PassManager<Function> : Skipping NOP
-- 373. PassManager<Function> : Skipping NOP
-- 374. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 375. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psra_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 376. PassManager<Function> : Skipping NOP
-- 377. PassManager<Function> : Skipping NOP
-- 378. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 379. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psra_d_15(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 380. PassManager<Function> : Skipping NOP
-- 381. PassManager<Function> : Skipping NOP
-- 382. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 383. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psra_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 384. PassManager<Function> : Skipping NOP
-- 385. PassManager<Function> : Skipping NOP
-- 386. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 387. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psra_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psra_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psra_d_64(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 388. PassManager<Function> : Skipping NOP
-- 389. PassManager<Function> : Skipping NOP
-- 390. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 391. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psra_q_128_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 392. PassManager<Function> : Skipping NOP
-- 393. PassManager<Function> : Skipping NOP
-- 394. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_15(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 395. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_15(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psra_q_128_15(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 396. PassManager<Function> : Skipping NOP
-- 397. PassManager<Function> : Skipping NOP
-- 398. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_64(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 399. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psra_q_128_64(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_128 <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psra_q_128_64(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 63, 63 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 400. PassManager<Function> : Skipping NOP
-- 401. PassManager<Function> : Skipping NOP
-- 402. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 403. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psra_q_256_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 404. PassManager<Function> : Skipping NOP
-- 405. PassManager<Function> : Skipping NOP
-- 406. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 407. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psra_q_256_15(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 408. PassManager<Function> : Skipping NOP
-- 409. PassManager<Function> : Skipping NOP
-- 410. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 411. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psra_q_256_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_256 <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psra_q_256_64(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 63, 63, 63, 63 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 412. PassManager<Function> : Skipping NOP
-- 413. PassManager<Function> : Skipping NOP
-- 414. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 415. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psra_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 416. PassManager<Function> : Skipping NOP
-- 417. PassManager<Function> : Skipping NOP
-- 418. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 419. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psra_w_512_15(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 420. PassManager<Function> : Skipping NOP
-- 421. PassManager<Function> : Skipping NOP
-- 422. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_15_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 423. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_15_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psra_w_512_15_splat(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 424. PassManager<Function> : Skipping NOP
-- 425. PassManager<Function> : Skipping NOP
-- 426. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 427. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psra_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psra_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psra_w_512_64(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 428. PassManager<Function> : Skipping NOP
-- 429. PassManager<Function> : Skipping NOP
-- 430. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 431. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psra_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 432. PassManager<Function> : Skipping NOP
-- 433. PassManager<Function> : Skipping NOP
-- 434. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 435. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psra_d_512_15(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 436. PassManager<Function> : Skipping NOP
-- 437. PassManager<Function> : Skipping NOP
-- 438. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 439. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psra_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 440. PassManager<Function> : Skipping NOP
-- 441. PassManager<Function> : Skipping NOP
-- 442. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 443. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psra_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psra_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psra_d_512_64(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 444. PassManager<Function> : Skipping NOP
-- 445. PassManager<Function> : Skipping NOP
-- 446. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 447. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psra_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 448. PassManager<Function> : Skipping NOP
-- 449. PassManager<Function> : Skipping NOP
-- 450. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 451. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psra_q_512_15(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 452. PassManager<Function> : Skipping NOP
-- 453. PassManager<Function> : Skipping NOP
-- 454. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 455. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psra_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psra_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psra_q_512_64(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 63, 63, 63, 63, 63, 63, 63, 63 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 456. PassManager<Function> : Skipping NOP
-- 457. PassManager<Function> : Skipping NOP
-- 458. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 459. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrl_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 460. PassManager<Function> : Skipping NOP
-- 461. PassManager<Function> : Skipping NOP
-- 462. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 463. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrl_w_15(<8 x i16> %v) {
#0:
  %#1 = lshr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 464. PassManager<Function> : Skipping NOP
-- 465. PassManager<Function> : Skipping NOP
-- 466. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 467. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrl_w_15_splat(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 468. PassManager<Function> : Skipping NOP
-- 469. PassManager<Function> : Skipping NOP
-- 470. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 471. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psrl_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psrl_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psrl_w_64(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 472. PassManager<Function> : Skipping NOP
-- 473. PassManager<Function> : Skipping NOP
-- 474. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 475. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrl_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 476. PassManager<Function> : Skipping NOP
-- 477. PassManager<Function> : Skipping NOP
-- 478. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 479. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrl_d_15(<4 x i32> %v) {
#0:
  %#1 = lshr <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 480. PassManager<Function> : Skipping NOP
-- 481. PassManager<Function> : Skipping NOP
-- 482. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 483. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrl_d_15_splat(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 484. PassManager<Function> : Skipping NOP
-- 485. PassManager<Function> : Skipping NOP
-- 486. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 487. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psrl_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psrl_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psrl_d_64(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 488. PassManager<Function> : Skipping NOP
-- 489. PassManager<Function> : Skipping NOP
-- 490. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 491. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrl_q_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 492. PassManager<Function> : Skipping NOP
-- 493. PassManager<Function> : Skipping NOP
-- 494. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 495. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrl_q_15(<2 x i64> %v) {
#0:
  %#1 = lshr <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 496. PassManager<Function> : Skipping NOP
-- 497. PassManager<Function> : Skipping NOP
-- 498. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 499. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psrl_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psrl_q <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psrl_q_64(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 500. PassManager<Function> : Skipping NOP
-- 501. PassManager<Function> : Skipping NOP
-- 502. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 503. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrl_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 504. PassManager<Function> : Skipping NOP
-- 505. PassManager<Function> : Skipping NOP
-- 506. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 507. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrl_w_15(<16 x i16> %v) {
#0:
  %#1 = lshr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 508. PassManager<Function> : Skipping NOP
-- 509. PassManager<Function> : Skipping NOP
-- 510. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 511. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrl_w_15_splat(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 512. PassManager<Function> : Skipping NOP
-- 513. PassManager<Function> : Skipping NOP
-- 514. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 515. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psrl_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psrl_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psrl_w_64(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 516. PassManager<Function> : Skipping NOP
-- 517. PassManager<Function> : Skipping NOP
-- 518. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 519. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrl_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 520. PassManager<Function> : Skipping NOP
-- 521. PassManager<Function> : Skipping NOP
-- 522. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 523. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrl_d_15(<8 x i32> %v) {
#0:
  %#1 = lshr <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 524. PassManager<Function> : Skipping NOP
-- 525. PassManager<Function> : Skipping NOP
-- 526. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 527. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrl_d_15_splat(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 528. PassManager<Function> : Skipping NOP
-- 529. PassManager<Function> : Skipping NOP
-- 530. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 531. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrl_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrl_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrl_d_64(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 532. PassManager<Function> : Skipping NOP
-- 533. PassManager<Function> : Skipping NOP
-- 534. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 535. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrl_q_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 536. PassManager<Function> : Skipping NOP
-- 537. PassManager<Function> : Skipping NOP
-- 538. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 539. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrl_q_15(<4 x i64> %v) {
#0:
  %#1 = lshr <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 540. PassManager<Function> : Skipping NOP
-- 541. PassManager<Function> : Skipping NOP
-- 542. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 543. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrl_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrl_q <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrl_q_64(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 544. PassManager<Function> : Skipping NOP
-- 545. PassManager<Function> : Skipping NOP
-- 546. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 547. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrl_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 548. PassManager<Function> : Skipping NOP
-- 549. PassManager<Function> : Skipping NOP
-- 550. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 551. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrl_w_512_15(<32 x i16> %v) {
#0:
  %#1 = lshr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 552. PassManager<Function> : Skipping NOP
-- 553. PassManager<Function> : Skipping NOP
-- 554. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_15_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 555. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_15_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrl_w_512_15_splat(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 556. PassManager<Function> : Skipping NOP
-- 557. PassManager<Function> : Skipping NOP
-- 558. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 559. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrl_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrl_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrl_w_512_64(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 560. PassManager<Function> : Skipping NOP
-- 561. PassManager<Function> : Skipping NOP
-- 562. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 563. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrl_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 564. PassManager<Function> : Skipping NOP
-- 565. PassManager<Function> : Skipping NOP
-- 566. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 567. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrl_d_512_15(<16 x i32> %v) {
#0:
  %#1 = lshr <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 568. PassManager<Function> : Skipping NOP
-- 569. PassManager<Function> : Skipping NOP
-- 570. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 571. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrl_d_512_15_splat(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 572. PassManager<Function> : Skipping NOP
-- 573. PassManager<Function> : Skipping NOP
-- 574. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 575. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrl_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrl_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrl_d_512_64(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 576. PassManager<Function> : Skipping NOP
-- 577. PassManager<Function> : Skipping NOP
-- 578. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 579. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrl_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 580. PassManager<Function> : Skipping NOP
-- 581. PassManager<Function> : Skipping NOP
-- 582. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 583. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrl_q_512_15(<8 x i64> %v) {
#0:
  %#1 = lshr <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 584. PassManager<Function> : Skipping NOP
-- 585. PassManager<Function> : Skipping NOP
-- 586. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 587. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrl_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrl_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrl_q_512_64(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 588. PassManager<Function> : Skipping NOP
-- 589. PassManager<Function> : Skipping NOP
-- 590. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 591. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_0(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psll_w_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 592. PassManager<Function> : Skipping NOP
-- 593. PassManager<Function> : Skipping NOP
-- 594. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 595. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_15(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psll_w_15(<8 x i16> %v) {
#0:
  %#1 = shl <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 596. PassManager<Function> : Skipping NOP
-- 597. PassManager<Function> : Skipping NOP
-- 598. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 599. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_15_splat(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psll_w_15_splat(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 600. PassManager<Function> : Skipping NOP
-- 601. PassManager<Function> : Skipping NOP
-- 602. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 603. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psll_w_64(<8 x i16> %v) {
#0:
  %#1 = x86_sse2_psll_w <8 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @sse2_psll_w_64(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 604. PassManager<Function> : Skipping NOP
-- 605. PassManager<Function> : Skipping NOP
-- 606. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 607. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_0(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psll_d_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 608. PassManager<Function> : Skipping NOP
-- 609. PassManager<Function> : Skipping NOP
-- 610. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 611. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_15(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psll_d_15(<4 x i32> %v) {
#0:
  %#1 = shl <4 x i32> %v, { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 612. PassManager<Function> : Skipping NOP
-- 613. PassManager<Function> : Skipping NOP
-- 614. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 615. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_15_splat(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psll_d_15_splat(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 616. PassManager<Function> : Skipping NOP
-- 617. PassManager<Function> : Skipping NOP
-- 618. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 619. InstCombinePass

----------------------------------------
define <4 x i32> @sse2_psll_d_64(<4 x i32> %v) {
#0:
  %#1 = x86_sse2_psll_d <4 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @sse2_psll_d_64(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 620. PassManager<Function> : Skipping NOP
-- 621. PassManager<Function> : Skipping NOP
-- 622. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 623. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_0(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psll_q_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 624. PassManager<Function> : Skipping NOP
-- 625. PassManager<Function> : Skipping NOP
-- 626. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 627. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_15(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 15, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psll_q_15(<2 x i64> %v) {
#0:
  %#1 = shl <2 x i64> %v, { 15, 15 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 628. PassManager<Function> : Skipping NOP
-- 629. PassManager<Function> : Skipping NOP
-- 630. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 631. InstCombinePass

----------------------------------------
define <2 x i64> @sse2_psll_q_64(<2 x i64> %v) {
#0:
  %#1 = x86_sse2_psll_q <2 x i64> %v, <2 x i64> { 64, 9999 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @sse2_psll_q_64(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 632. PassManager<Function> : Skipping NOP
-- 633. PassManager<Function> : Skipping NOP
-- 634. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 635. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psll_w_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 636. PassManager<Function> : Skipping NOP
-- 637. PassManager<Function> : Skipping NOP
-- 638. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 639. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_15(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psll_w_15(<16 x i16> %v) {
#0:
  %#1 = shl <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 640. PassManager<Function> : Skipping NOP
-- 641. PassManager<Function> : Skipping NOP
-- 642. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 643. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_15_splat(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psll_w_15_splat(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 644. PassManager<Function> : Skipping NOP
-- 645. PassManager<Function> : Skipping NOP
-- 646. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 647. InstCombinePass

----------------------------------------
define <16 x i16> @avx2_psll_w_64(<16 x i16> %v) {
#0:
  %#1 = x86_avx2_psll_w <16 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx2_psll_w_64(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 648. PassManager<Function> : Skipping NOP
-- 649. PassManager<Function> : Skipping NOP
-- 650. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 651. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psll_d_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 652. PassManager<Function> : Skipping NOP
-- 653. PassManager<Function> : Skipping NOP
-- 654. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 655. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_15(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psll_d_15(<8 x i32> %v) {
#0:
  %#1 = shl <8 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 656. PassManager<Function> : Skipping NOP
-- 657. PassManager<Function> : Skipping NOP
-- 658. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 659. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_15_splat(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psll_d_15_splat(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 660. PassManager<Function> : Skipping NOP
-- 661. PassManager<Function> : Skipping NOP
-- 662. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 663. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psll_d_64(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psll_d <8 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psll_d_64(<8 x i32> %v) {
#0:
  ret <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 664. PassManager<Function> : Skipping NOP
-- 665. PassManager<Function> : Skipping NOP
-- 666. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 667. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psll_q_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 668. PassManager<Function> : Skipping NOP
-- 669. PassManager<Function> : Skipping NOP
-- 670. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 671. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_15(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 15, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psll_q_15(<4 x i64> %v) {
#0:
  %#1 = shl <4 x i64> %v, { 15, 15, 15, 15 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 672. PassManager<Function> : Skipping NOP
-- 673. PassManager<Function> : Skipping NOP
-- 674. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 675. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psll_q_64(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psll_q <4 x i64> %v, <2 x i64> { 64, 9999 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psll_q_64(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 676. PassManager<Function> : Skipping NOP
-- 677. PassManager<Function> : Skipping NOP
-- 678. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 679. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psll_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 680. PassManager<Function> : Skipping NOP
-- 681. PassManager<Function> : Skipping NOP
-- 682. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 683. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_15(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 15, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psll_w_512_15(<32 x i16> %v) {
#0:
  %#1 = shl <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 684. PassManager<Function> : Skipping NOP
-- 685. PassManager<Function> : Skipping NOP
-- 686. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_15_512_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 687. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_15_512_splat(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psll_w_15_512_splat(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 688. PassManager<Function> : Skipping NOP
-- 689. PassManager<Function> : Skipping NOP
-- 690. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 691. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psll_w_512_64(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psll_w_512 <32 x i16> %v, <8 x i16> { 64, 0, 0, 0, 9999, 9999, 9999, 9999 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psll_w_512_64(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 692. PassManager<Function> : Skipping NOP
-- 693. PassManager<Function> : Skipping NOP
-- 694. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 695. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psll_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 696. PassManager<Function> : Skipping NOP
-- 697. PassManager<Function> : Skipping NOP
-- 698. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 699. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_15(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 15, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psll_d_512_15(<16 x i32> %v) {
#0:
  %#1 = shl <16 x i32> %v, { 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 700. PassManager<Function> : Skipping NOP
-- 701. PassManager<Function> : Skipping NOP
-- 702. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 703. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_15_splat(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 15, 15, 15, 15 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psll_d_512_15_splat(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 704. PassManager<Function> : Skipping NOP
-- 705. PassManager<Function> : Skipping NOP
-- 706. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 707. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psll_d_512_64(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psll_d_512 <16 x i32> %v, <4 x i32> { 64, 0, 9999, 9999 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psll_d_512_64(<16 x i32> %v) {
#0:
  ret <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 708. PassManager<Function> : Skipping NOP
-- 709. PassManager<Function> : Skipping NOP
-- 710. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 711. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psll_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 712. PassManager<Function> : Skipping NOP
-- 713. PassManager<Function> : Skipping NOP
-- 714. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 715. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_15(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 15, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psll_q_512_15(<8 x i64> %v) {
#0:
  %#1 = shl <8 x i64> %v, { 15, 15, 15, 15, 15, 15, 15, 15 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 716. PassManager<Function> : Skipping NOP
-- 717. PassManager<Function> : Skipping NOP
-- 718. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 719. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psll_q_512_64(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psll_q_512 <8 x i64> %v, <2 x i64> { 64, 9999 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psll_q_512_64(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 720. PassManager<Function> : Skipping NOP
-- 721. PassManager<Function> : Skipping NOP
-- 722. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 723. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrav_d_128_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 724. PassManager<Function> : Skipping NOP
-- 725. PassManager<Function> : Skipping NOP
-- 726. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 727. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrav_d_256_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 728. PassManager<Function> : Skipping NOP
-- 729. PassManager<Function> : Skipping NOP
-- 730. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 731. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrav_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 732. PassManager<Function> : Skipping NOP
-- 733. PassManager<Function> : Skipping NOP
-- 734. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 735. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrav_d_128_var(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 736. PassManager<Function> : Skipping NOP
-- 737. PassManager<Function> : Skipping NOP
-- 738. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 32, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 739. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 32, 24, 8, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrav_d_256_var(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 740. PassManager<Function> : Skipping NOP
-- 741. PassManager<Function> : Skipping NOP
-- 742. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 32, 24, 8, 0, 0, 8, 16, 24, 32, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 743. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 32, 24, 8, 0, 0, 8, 16, 24, 32, 24, 8, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrav_d_512_var(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 744. PassManager<Function> : Skipping NOP
-- 745. PassManager<Function> : Skipping NOP
-- 746. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 747. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrav_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { 31, 31, 31, undef }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 748. PassManager<Function> : Skipping NOP
-- 749. PassManager<Function> : Skipping NOP
-- 750. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 751. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrav_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { undef, 31, 31, 31, 31, 31, 31, 31 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 752. PassManager<Function> : Skipping NOP
-- 753. PassManager<Function> : Skipping NOP
-- 754. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 755. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrav_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { undef, 31, 31, 31, 31, 31, 31, 31, undef, 31, 31, 31, 31, 31, 31, 31 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 756. PassManager<Function> : Skipping NOP
-- 757. PassManager<Function> : Skipping NOP
-- 758. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 64 }, i32 poison, i32 0
  %#2 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 759. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrav_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 64 }, i32 poison, i32 0
  %#2 = x86_avx2_psrav_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
=>
define <4 x i32> @avx2_psrav_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = ashr <4 x i32> %v, { undef, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct!

-- 760. PassManager<Function> : Skipping NOP
-- 761. PassManager<Function> : Skipping NOP
-- 762. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 24, 32, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 763. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrav_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 24, 32, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psrav_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
=>
define <8 x i32> @avx2_psrav_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = ashr <8 x i32> %v, { 0, undef, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct!

-- 764. PassManager<Function> : Skipping NOP
-- 765. PassManager<Function> : Skipping NOP
-- 766. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 24, 32, 24, 8, 0, 0, 8, 16, 24, 32, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 767. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrav_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 24, 32, 24, 8, 0, 0, 8, 16, 24, 32, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psrav_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
=>
define <16 x i32> @avx512_psrav_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = ashr <16 x i32> %v, { 0, undef, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 768. PassManager<Function> : Skipping NOP
-- 769. PassManager<Function> : Skipping NOP
-- 770. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 771. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrav_q_128_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 772. PassManager<Function> : Skipping NOP
-- 773. PassManager<Function> : Skipping NOP
-- 774. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 775. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrav_q_256_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 776. PassManager<Function> : Skipping NOP
-- 777. PassManager<Function> : Skipping NOP
-- 778. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 779. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrav_q_128_var(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 0, 8 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 780. PassManager<Function> : Skipping NOP
-- 781. PassManager<Function> : Skipping NOP
-- 782. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 783. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrav_q_256_var(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 784. PassManager<Function> : Skipping NOP
-- 785. PassManager<Function> : Skipping NOP
-- 786. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 64, poison }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 787. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> { 64, poison }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx512_psrav_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { 63, undef }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 788. PassManager<Function> : Skipping NOP
-- 789. PassManager<Function> : Skipping NOP
-- 790. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 791. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx512_psrav_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { 63, undef, 63, 63 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 792. PassManager<Function> : Skipping NOP
-- 793. PassManager<Function> : Skipping NOP
-- 794. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 795. InstCombinePass

----------------------------------------
define <2 x i64> @avx512_psrav_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_128 <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
=>
define <2 x i64> @avx512_psrav_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = ashr <2 x i64> %v, { poison, 8 }
  ret <2 x i64> %#1
}
Transformation seems to be correct!

-- 796. PassManager<Function> : Skipping NOP
-- 797. PassManager<Function> : Skipping NOP
-- 798. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 799. InstCombinePass

----------------------------------------
define <4 x i64> @avx512_psrav_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
=>
define <4 x i64> @avx512_psrav_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = ashr <4 x i64> %v, { poison, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation seems to be correct!

-- 800. PassManager<Function> : Skipping NOP
-- 801. PassManager<Function> : Skipping NOP
-- 802. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 803. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrav_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 804. PassManager<Function> : Skipping NOP
-- 805. PassManager<Function> : Skipping NOP
-- 806. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 807. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrav_q_512_var(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 808. PassManager<Function> : Skipping NOP
-- 809. PassManager<Function> : Skipping NOP
-- 810. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 811. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrav_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { 63, undef, 63, 63, 63, undef, 63, 63 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 812. PassManager<Function> : Skipping NOP
-- 813. PassManager<Function> : Skipping NOP
-- 814. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 815. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrav_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrav_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
=>
define <8 x i64> @avx512_psrav_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = ashr <8 x i64> %v, { poison, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation seems to be correct!

-- 816. PassManager<Function> : Skipping NOP
-- 817. PassManager<Function> : Skipping NOP
-- 818. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 819. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrav_w_128_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 820. PassManager<Function> : Skipping NOP
-- 821. PassManager<Function> : Skipping NOP
-- 822. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 823. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrav_w_128_var(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 824. PassManager<Function> : Skipping NOP
-- 825. PassManager<Function> : Skipping NOP
-- 826. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 827. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrav_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, undef }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 828. PassManager<Function> : Skipping NOP
-- 829. PassManager<Function> : Skipping NOP
-- 830. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 831. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrav_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
=>
define <8 x i16> @avx512_psrav_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = ashr <8 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation seems to be correct!

-- 832. PassManager<Function> : Skipping NOP
-- 833. PassManager<Function> : Skipping NOP
-- 834. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 835. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrav_w_256_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 836. PassManager<Function> : Skipping NOP
-- 837. PassManager<Function> : Skipping NOP
-- 838. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 839. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrav_w_256_var(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 840. PassManager<Function> : Skipping NOP
-- 841. PassManager<Function> : Skipping NOP
-- 842. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 843. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrav_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, undef, 15, 15, 15, 15, 15, 15, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 844. PassManager<Function> : Skipping NOP
-- 845. PassManager<Function> : Skipping NOP
-- 846. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 847. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrav_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
=>
define <16 x i16> @avx512_psrav_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = ashr <16 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 848. PassManager<Function> : Skipping NOP
-- 849. PassManager<Function> : Skipping NOP
-- 850. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 851. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrav_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 852. PassManager<Function> : Skipping NOP
-- 853. PassManager<Function> : Skipping NOP
-- 854. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 855. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrav_w_512_var(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 856. PassManager<Function> : Skipping NOP
-- 857. PassManager<Function> : Skipping NOP
-- 858. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 859. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrav_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { 15, 15, 15, 15, 15, 15, 15, 15, undef, 15, 15, 15, 15, 15, 15, 15, 15, 15, undef, 15, 15, 15, 15, 15, 15, 15, undef, 15, 15, undef, 15, 15 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 860. PassManager<Function> : Skipping NOP
-- 861. PassManager<Function> : Skipping NOP
-- 862. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 863. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrav_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psrav_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
=>
define <32 x i16> @avx512_psrav_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = ashr <32 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 864. PassManager<Function> : Skipping NOP
-- 865. PassManager<Function> : Skipping NOP
-- 866. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 867. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrlv_d_128_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 868. PassManager<Function> : Skipping NOP
-- 869. PassManager<Function> : Skipping NOP
-- 870. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 871. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrlv_d_256_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 872. PassManager<Function> : Skipping NOP
-- 873. PassManager<Function> : Skipping NOP
-- 874. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 875. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrlv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = lshr <4 x i32> %v, { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 876. PassManager<Function> : Skipping NOP
-- 877. PassManager<Function> : Skipping NOP
-- 878. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 879. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrlv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = lshr <8 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 880. PassManager<Function> : Skipping NOP
-- 881. PassManager<Function> : Skipping NOP
-- 882. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_big(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 883. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_big(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 884. PassManager<Function> : Skipping NOP
-- 885. PassManager<Function> : Skipping NOP
-- 886. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_big(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 887. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_big(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 888. PassManager<Function> : Skipping NOP
-- 889. PassManager<Function> : Skipping NOP
-- 890. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 891. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psrlv_d_128_allbig(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, undef }
}
Transformation seems to be correct!

-- 892. PassManager<Function> : Skipping NOP
-- 893. PassManager<Function> : Skipping NOP
-- 894. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 895. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psrlv_d_256_allbig(<8 x i32> %v) {
#0:
  ret <8 x i32> { undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 896. PassManager<Function> : Skipping NOP
-- 897. PassManager<Function> : Skipping NOP
-- 898. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 31 }, i32 poison, i32 0
  %#2 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 899. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psrlv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 31 }, i32 poison, i32 0
  %#2 = x86_avx2_psrlv_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
=>
define <4 x i32> @avx2_psrlv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = lshr <4 x i32> %v, { poison, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 900. PassManager<Function> : Skipping NOP
-- 901. PassManager<Function> : Skipping NOP
-- 902. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 903. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psrlv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psrlv_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
=>
define <8 x i32> @avx2_psrlv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = lshr <8 x i32> %v, { 0, poison, 16, 31, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 904. PassManager<Function> : Skipping NOP
-- 905. PassManager<Function> : Skipping NOP
-- 906. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 907. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psrlv_q_128_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 908. PassManager<Function> : Skipping NOP
-- 909. PassManager<Function> : Skipping NOP
-- 910. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 911. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrlv_q_256_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 912. PassManager<Function> : Skipping NOP
-- 913. PassManager<Function> : Skipping NOP
-- 914. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 915. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psrlv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = lshr <2 x i64> %v, { 0, 8 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 916. PassManager<Function> : Skipping NOP
-- 917. PassManager<Function> : Skipping NOP
-- 918. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 919. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrlv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = lshr <4 x i64> %v, { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 920. PassManager<Function> : Skipping NOP
-- 921. PassManager<Function> : Skipping NOP
-- 922. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_big(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 128 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 923. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_big(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 0, 128 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 924. PassManager<Function> : Skipping NOP
-- 925. PassManager<Function> : Skipping NOP
-- 926. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_big(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 64 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 927. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_big(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 64 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 928. PassManager<Function> : Skipping NOP
-- 929. PassManager<Function> : Skipping NOP
-- 930. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 128, -64 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 931. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> { 128, -64 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psrlv_q_128_allbig(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 932. PassManager<Function> : Skipping NOP
-- 933. PassManager<Function> : Skipping NOP
-- 934. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 935. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psrlv_q_256_allbig(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 936. PassManager<Function> : Skipping NOP
-- 937. PassManager<Function> : Skipping NOP
-- 938. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 1
  %#2 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 939. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psrlv_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 1
  %#2 = x86_avx2_psrlv_q <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
=>
define <2 x i64> @avx2_psrlv_q_128_poison(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 940. PassManager<Function> : Skipping NOP
-- 941. PassManager<Function> : Skipping NOP
-- 942. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 943. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psrlv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx2_psrlv_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
=>
define <4 x i64> @avx2_psrlv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = lshr <4 x i64> %v, { poison, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 944. PassManager<Function> : Skipping NOP
-- 945. PassManager<Function> : Skipping NOP
-- 946. InstCombinePass

----------------------------------------
define <16 x i32> @avx2_psrlv_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 947. InstCombinePass

----------------------------------------
define <16 x i32> @avx2_psrlv_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx2_psrlv_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 948. PassManager<Function> : Skipping NOP
-- 949. PassManager<Function> : Skipping NOP
-- 950. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 951. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrlv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = lshr <16 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 952. PassManager<Function> : Skipping NOP
-- 953. PassManager<Function> : Skipping NOP
-- 954. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_big(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 64, 31, 24, 8, 0, 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 955. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_big(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 64, 31, 24, 8, 0, 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 956. PassManager<Function> : Skipping NOP
-- 957. PassManager<Function> : Skipping NOP
-- 958. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 959. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psrlv_d_512_allbig(<16 x i32> %v) {
#0:
  ret <16 x i32> { undef, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 960. PassManager<Function> : Skipping NOP
-- 961. PassManager<Function> : Skipping NOP
-- 962. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 963. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psrlv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psrlv_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
=>
define <16 x i32> @avx512_psrlv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = lshr <16 x i32> %v, { 0, poison, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 964. PassManager<Function> : Skipping NOP
-- 965. PassManager<Function> : Skipping NOP
-- 966. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 967. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrlv_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 968. PassManager<Function> : Skipping NOP
-- 969. PassManager<Function> : Skipping NOP
-- 970. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 971. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrlv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = lshr <8 x i64> %v, { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 972. PassManager<Function> : Skipping NOP
-- 973. PassManager<Function> : Skipping NOP
-- 974. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_big(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 64, 0, 8, 16, 64 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 975. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_big(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 64, 0, 8, 16, 64 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 976. PassManager<Function> : Skipping NOP
-- 977. PassManager<Function> : Skipping NOP
-- 978. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 979. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psrlv_q_512_allbig(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, undef, 0, 0, 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 980. PassManager<Function> : Skipping NOP
-- 981. PassManager<Function> : Skipping NOP
-- 982. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 983. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psrlv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psrlv_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
=>
define <8 x i64> @avx512_psrlv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = lshr <8 x i64> %v, { poison, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 984. PassManager<Function> : Skipping NOP
-- 985. PassManager<Function> : Skipping NOP
-- 986. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 987. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrlv_w_128_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 988. PassManager<Function> : Skipping NOP
-- 989. PassManager<Function> : Skipping NOP
-- 990. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 991. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrlv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = lshr <8 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 992. PassManager<Function> : Skipping NOP
-- 993. PassManager<Function> : Skipping NOP
-- 994. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_big(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 16 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 995. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_big(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 16 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 996. PassManager<Function> : Skipping NOP
-- 997. PassManager<Function> : Skipping NOP
-- 998. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 999. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psrlv_w_128_allbig(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, undef }
}
Transformation seems to be correct!

-- 1000. PassManager<Function> : Skipping NOP
-- 1001. PassManager<Function> : Skipping NOP
-- 1002. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1003. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psrlv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
=>
define <8 x i16> @avx512_psrlv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = lshr <8 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1004. PassManager<Function> : Skipping NOP
-- 1005. PassManager<Function> : Skipping NOP
-- 1006. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1007. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrlv_w_256_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1008. PassManager<Function> : Skipping NOP
-- 1009. PassManager<Function> : Skipping NOP
-- 1010. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1011. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrlv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = lshr <16 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1012. PassManager<Function> : Skipping NOP
-- 1013. PassManager<Function> : Skipping NOP
-- 1014. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_big(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1015. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_big(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1016. PassManager<Function> : Skipping NOP
-- 1017. PassManager<Function> : Skipping NOP
-- 1018. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1019. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psrlv_w_256_allbig(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 1020. PassManager<Function> : Skipping NOP
-- 1021. PassManager<Function> : Skipping NOP
-- 1022. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1023. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psrlv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
=>
define <16 x i16> @avx512_psrlv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = lshr <16 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1024. PassManager<Function> : Skipping NOP
-- 1025. PassManager<Function> : Skipping NOP
-- 1026. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1027. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrlv_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1028. PassManager<Function> : Skipping NOP
-- 1029. PassManager<Function> : Skipping NOP
-- 1030. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1031. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrlv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = lshr <32 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1032. PassManager<Function> : Skipping NOP
-- 1033. PassManager<Function> : Skipping NOP
-- 1034. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_big(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1035. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_big(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1036. PassManager<Function> : Skipping NOP
-- 1037. PassManager<Function> : Skipping NOP
-- 1038. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1039. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psrlv_w_512_allbig(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 1040. PassManager<Function> : Skipping NOP
-- 1041. PassManager<Function> : Skipping NOP
-- 1042. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1043. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psrlv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psrlv_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
=>
define <32 x i16> @avx512_psrlv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = lshr <32 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1044. PassManager<Function> : Skipping NOP
-- 1045. PassManager<Function> : Skipping NOP
-- 1046. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1047. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_0(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 0, 0, 0 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psllv_d_128_0(<4 x i32> %v) {
#0:
  ret <4 x i32> %v
}
Transformation seems to be correct!

-- 1048. PassManager<Function> : Skipping NOP
-- 1049. PassManager<Function> : Skipping NOP
-- 1050. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1051. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_0(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psllv_d_256_0(<8 x i32> %v) {
#0:
  ret <8 x i32> %v
}
Transformation seems to be correct!

-- 1052. PassManager<Function> : Skipping NOP
-- 1053. PassManager<Function> : Skipping NOP
-- 1054. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1055. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psllv_d_128_var(<4 x i32> %v) {
#0:
  %#1 = shl <4 x i32> %v, { 0, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1056. PassManager<Function> : Skipping NOP
-- 1057. PassManager<Function> : Skipping NOP
-- 1058. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1059. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psllv_d_256_var(<8 x i32> %v) {
#0:
  %#1 = shl <8 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1060. PassManager<Function> : Skipping NOP
-- 1061. PassManager<Function> : Skipping NOP
-- 1062. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_big(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1063. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_big(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 0, 8, 16, 64 }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1064. PassManager<Function> : Skipping NOP
-- 1065. PassManager<Function> : Skipping NOP
-- 1066. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_big(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1067. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_big(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1068. PassManager<Function> : Skipping NOP
-- 1069. PassManager<Function> : Skipping NOP
-- 1070. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1071. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_allbig(<4 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> { 32, 100, 4294967041, poison }
  ret <4 x i32> %#1
}
=>
define <4 x i32> @avx2_psllv_d_128_allbig(<4 x i32> %v) {
#0:
  ret <4 x i32> { 0, 0, 0, undef }
}
Transformation seems to be correct!

-- 1072. PassManager<Function> : Skipping NOP
-- 1073. PassManager<Function> : Skipping NOP
-- 1074. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1075. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_allbig(<8 x i32> %v) {
#0:
  %#1 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <8 x i32> %#1
}
=>
define <8 x i32> @avx2_psllv_d_256_allbig(<8 x i32> %v) {
#0:
  ret <8 x i32> { undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 1076. PassManager<Function> : Skipping NOP
-- 1077. PassManager<Function> : Skipping NOP
-- 1078. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 31 }, i32 poison, i32 0
  %#2 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1079. InstCombinePass

----------------------------------------
define <4 x i32> @avx2_psllv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = insertelement <4 x i32> { 0, 8, 16, 31 }, i32 poison, i32 0
  %#2 = x86_avx2_psllv_d <4 x i32> %v, <4 x i32> %#1
  ret <4 x i32> %#2
}
=>
define <4 x i32> @avx2_psllv_d_128_poison(<4 x i32> %v) {
#0:
  %#1 = shl <4 x i32> %v, { poison, 8, 16, 31 }
  ret <4 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1080. PassManager<Function> : Skipping NOP
-- 1081. PassManager<Function> : Skipping NOP
-- 1082. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1083. InstCombinePass

----------------------------------------
define <8 x i32> @avx2_psllv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = insertelement <8 x i32> { 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx2_psllv_d_256 <8 x i32> %v, <8 x i32> %#1
  ret <8 x i32> %#2
}
=>
define <8 x i32> @avx2_psllv_d_256_poison(<8 x i32> %v) {
#0:
  %#1 = shl <8 x i32> %v, { 0, poison, 16, 31, 31, 24, 8, 0 }
  ret <8 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1084. PassManager<Function> : Skipping NOP
-- 1085. PassManager<Function> : Skipping NOP
-- 1086. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1087. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_0(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 0 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psllv_q_128_0(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 1088. PassManager<Function> : Skipping NOP
-- 1089. PassManager<Function> : Skipping NOP
-- 1090. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1091. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_0(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 0, 0, 0 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psllv_q_256_0(<4 x i64> %v) {
#0:
  ret <4 x i64> %v
}
Transformation seems to be correct!

-- 1092. PassManager<Function> : Skipping NOP
-- 1093. PassManager<Function> : Skipping NOP
-- 1094. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1095. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 8 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psllv_q_128_var(<2 x i64> %v) {
#0:
  %#1 = shl <2 x i64> %v, { 0, 8 }
  ret <2 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1096. PassManager<Function> : Skipping NOP
-- 1097. PassManager<Function> : Skipping NOP
-- 1098. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1099. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psllv_q_256_var(<4 x i64> %v) {
#0:
  %#1 = shl <4 x i64> %v, { 0, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1100. PassManager<Function> : Skipping NOP
-- 1101. PassManager<Function> : Skipping NOP
-- 1102. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_big(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 128 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1103. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_big(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 0, 128 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1104. PassManager<Function> : Skipping NOP
-- 1105. PassManager<Function> : Skipping NOP
-- 1106. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_big(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 64 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1107. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_big(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 0, 8, 16, 64 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1108. PassManager<Function> : Skipping NOP
-- 1109. PassManager<Function> : Skipping NOP
-- 1110. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 128, -64 }
  ret <2 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1111. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_allbig(<2 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> { 128, -64 }
  ret <2 x i64> %#1
}
=>
define <2 x i64> @avx2_psllv_q_128_allbig(<2 x i64> %v) {
#0:
  ret <2 x i64> { 0, 0 }
}
Transformation seems to be correct!

-- 1112. PassManager<Function> : Skipping NOP
-- 1113. PassManager<Function> : Skipping NOP
-- 1114. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1115. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_allbig(<4 x i64> %v) {
#0:
  %#1 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> { 64, poison, -128, -60 }
  ret <4 x i64> %#1
}
=>
define <4 x i64> @avx2_psllv_q_256_allbig(<4 x i64> %v) {
#0:
  ret <4 x i64> { 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 1116. PassManager<Function> : Skipping NOP
-- 1117. PassManager<Function> : Skipping NOP
-- 1118. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 1
  %#2 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1119. InstCombinePass

----------------------------------------
define <2 x i64> @avx2_psllv_q_128_poison(<2 x i64> %v) {
#0:
  %#1 = insertelement <2 x i64> { 0, 8 }, i64 poison, i64 1
  %#2 = x86_avx2_psllv_q <2 x i64> %v, <2 x i64> %#1
  ret <2 x i64> %#2
}
=>
define <2 x i64> @avx2_psllv_q_128_poison(<2 x i64> %v) {
#0:
  ret <2 x i64> %v
}
Transformation seems to be correct!

-- 1120. PassManager<Function> : Skipping NOP
-- 1121. PassManager<Function> : Skipping NOP
-- 1122. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1123. InstCombinePass

----------------------------------------
define <4 x i64> @avx2_psllv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = insertelement <4 x i64> { 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx2_psllv_q_256 <4 x i64> %v, <4 x i64> %#1
  ret <4 x i64> %#2
}
=>
define <4 x i64> @avx2_psllv_q_256_poison(<4 x i64> %v) {
#0:
  %#1 = shl <4 x i64> %v, { poison, 8, 16, 31 }
  ret <4 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1124. PassManager<Function> : Skipping NOP
-- 1125. PassManager<Function> : Skipping NOP
-- 1126. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1127. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_0(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psllv_d_512_0(<16 x i32> %v) {
#0:
  ret <16 x i32> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1128. PassManager<Function> : Skipping NOP
-- 1129. PassManager<Function> : Skipping NOP
-- 1130. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1131. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psllv_d_512_var(<16 x i32> %v) {
#0:
  %#1 = shl <16 x i32> %v, { 0, 8, 16, 24, 31, 24, 8, 0, 0, 8, 16, 24, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1132. PassManager<Function> : Skipping NOP
-- 1133. PassManager<Function> : Skipping NOP
-- 1134. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_big(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 64, 31, 24, 8, 0, 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1135. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_big(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { 0, 8, 16, 64, 31, 24, 8, 0, 0, 8, 16, 64, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1136. PassManager<Function> : Skipping NOP
-- 1137. PassManager<Function> : Skipping NOP
-- 1138. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1139. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_allbig(<16 x i32> %v) {
#0:
  %#1 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> { poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741, poison, 100, 255, 55555, 4294967264, 4294967196, 4294967041, 4294911741 }
  ret <16 x i32> %#1
}
=>
define <16 x i32> @avx512_psllv_d_512_allbig(<16 x i32> %v) {
#0:
  ret <16 x i32> { undef, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 1140. PassManager<Function> : Skipping NOP
-- 1141. PassManager<Function> : Skipping NOP
-- 1142. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1143. InstCombinePass

----------------------------------------
define <16 x i32> @avx512_psllv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = insertelement <16 x i32> { 0, 8, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }, i32 poison, i32 1
  %#2 = x86_avx512_psllv_d_512 <16 x i32> %v, <16 x i32> %#1
  ret <16 x i32> %#2
}
=>
define <16 x i32> @avx512_psllv_d_512_poison(<16 x i32> %v) {
#0:
  %#1 = shl <16 x i32> %v, { 0, poison, 16, 31, 31, 24, 8, 0, 0, 8, 16, 31, 31, 24, 8, 0 }
  ret <16 x i32> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1144. PassManager<Function> : Skipping NOP
-- 1145. PassManager<Function> : Skipping NOP
-- 1146. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1147. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_0(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psllv_q_512_0(<8 x i64> %v) {
#0:
  ret <8 x i64> %v
}
Transformation seems to be correct!

-- 1148. PassManager<Function> : Skipping NOP
-- 1149. PassManager<Function> : Skipping NOP
-- 1150. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1151. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psllv_q_512_var(<8 x i64> %v) {
#0:
  %#1 = shl <8 x i64> %v, { 0, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1152. PassManager<Function> : Skipping NOP
-- 1153. PassManager<Function> : Skipping NOP
-- 1154. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_big(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 64, 0, 8, 16, 64 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1155. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_big(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 0, 8, 16, 64, 0, 8, 16, 64 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1156. PassManager<Function> : Skipping NOP
-- 1157. PassManager<Function> : Skipping NOP
-- 1158. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1159. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_allbig(<8 x i64> %v) {
#0:
  %#1 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> { 64, poison, -128, -60, 64, poison, -128, -60 }
  ret <8 x i64> %#1
}
=>
define <8 x i64> @avx512_psllv_q_512_allbig(<8 x i64> %v) {
#0:
  ret <8 x i64> { 0, undef, 0, 0, 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 1160. PassManager<Function> : Skipping NOP
-- 1161. PassManager<Function> : Skipping NOP
-- 1162. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1163. InstCombinePass

----------------------------------------
define <8 x i64> @avx512_psllv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = insertelement <8 x i64> { 0, 8, 16, 31, 0, 8, 16, 31 }, i64 poison, i64 0
  %#2 = x86_avx512_psllv_q_512 <8 x i64> %v, <8 x i64> %#1
  ret <8 x i64> %#2
}
=>
define <8 x i64> @avx512_psllv_q_512_poison(<8 x i64> %v) {
#0:
  %#1 = shl <8 x i64> %v, { poison, 8, 16, 31, 0, 8, 16, 31 }
  ret <8 x i64> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1164. PassManager<Function> : Skipping NOP
-- 1165. PassManager<Function> : Skipping NOP
-- 1166. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1167. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_0(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psllv_w_128_0(<8 x i16> %v) {
#0:
  ret <8 x i16> %v
}
Transformation seems to be correct!

-- 1168. PassManager<Function> : Skipping NOP
-- 1169. PassManager<Function> : Skipping NOP
-- 1170. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1171. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psllv_w_128_var(<8 x i16> %v) {
#0:
  %#1 = shl <8 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1172. PassManager<Function> : Skipping NOP
-- 1173. PassManager<Function> : Skipping NOP
-- 1174. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_big(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 16 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1175. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_big(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 16 }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1176. PassManager<Function> : Skipping NOP
-- 1177. PassManager<Function> : Skipping NOP
-- 1178. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1179. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_allbig(<8 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> { 20, 65535, 65534, 33, 44, 55, 66, poison }
  ret <8 x i16> %#1
}
=>
define <8 x i16> @avx512_psllv_w_128_allbig(<8 x i16> %v) {
#0:
  ret <8 x i16> { 0, 0, 0, 0, 0, 0, 0, undef }
}
Transformation seems to be correct!

-- 1180. PassManager<Function> : Skipping NOP
-- 1181. PassManager<Function> : Skipping NOP
-- 1182. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1183. InstCombinePass

----------------------------------------
define <8 x i16> @avx512_psllv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = insertelement <8 x i16> { 0, 1, 2, 3, 4, 5, 6, 7 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_128 <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
=>
define <8 x i16> @avx512_psllv_w_128_poison(<8 x i16> %v) {
#0:
  %#1 = shl <8 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7 }
  ret <8 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1184. PassManager<Function> : Skipping NOP
-- 1185. PassManager<Function> : Skipping NOP
-- 1186. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1187. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_0(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psllv_w_256_0(<16 x i16> %v) {
#0:
  ret <16 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1188. PassManager<Function> : Skipping NOP
-- 1189. PassManager<Function> : Skipping NOP
-- 1190. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1191. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psllv_w_256_var(<16 x i16> %v) {
#0:
  %#1 = shl <16 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1192. PassManager<Function> : Skipping NOP
-- 1193. PassManager<Function> : Skipping NOP
-- 1194. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_big(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1195. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_big(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1196. PassManager<Function> : Skipping NOP
-- 1197. PassManager<Function> : Skipping NOP
-- 1198. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1199. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_allbig(<16 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 256, 16, 28, 65535, 32767 }
  ret <16 x i16> %#1
}
=>
define <16 x i16> @avx512_psllv_w_256_allbig(<16 x i16> %v) {
#0:
  ret <16 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!

-- 1200. PassManager<Function> : Skipping NOP
-- 1201. PassManager<Function> : Skipping NOP
-- 1202. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1203. InstCombinePass

----------------------------------------
define <16 x i16> @avx512_psllv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = insertelement <16 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_256 <16 x i16> %v, <16 x i16> %#1
  ret <16 x i16> %#2
}
=>
define <16 x i16> @avx512_psllv_w_256_poison(<16 x i16> %v) {
#0:
  %#1 = shl <16 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
  ret <16 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1204. PassManager<Function> : Skipping NOP
-- 1205. PassManager<Function> : Skipping NOP
-- 1206. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1207. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_0(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psllv_w_512_0(<32 x i16> %v) {
#0:
  ret <32 x i16> %v
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1208. PassManager<Function> : Skipping NOP
-- 1209. PassManager<Function> : Skipping NOP
-- 1210. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1211. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psllv_w_512_var(<32 x i16> %v) {
#0:
  %#1 = shl <32 x i16> %v, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1212. PassManager<Function> : Skipping NOP
-- 1213. PassManager<Function> : Skipping NOP
-- 1214. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_big(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1215. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_big(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1216. PassManager<Function> : Skipping NOP
-- 1217. PassManager<Function> : Skipping NOP
-- 1218. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
Transformation seems to be correct! (syntactically equal)

-- 1219. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_allbig(<32 x i16> %v) {
#0:
  %#1 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> { 20, 65535, 65534, 33, 44, 55, 66, 65529, poison, 64, 65526, 128, 16, 28, 65535, 32767, 56, 65522, poison, 16, 67, 567, 32768, 4096, 8192, 53191, poison, 345, 123, poison, 1024, 54321 }
  ret <32 x i16> %#1
}
=>
define <32 x i16> @avx512_psllv_w_512_allbig(<32 x i16> %v) {
#0:
  ret <32 x i16> { 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, 0, 0, 0, 0, 0, undef, 0, 0, undef, 0, 0 }
}
Transformation seems to be correct!

-- 1220. PassManager<Function> : Skipping NOP
-- 1221. PassManager<Function> : Skipping NOP
-- 1222. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1223. InstCombinePass

----------------------------------------
define <32 x i16> @avx512_psllv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = insertelement <32 x i16> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }, i16 poison, i64 0
  %#2 = x86_avx512_psllv_w_512 <32 x i16> %v, <32 x i16> %#1
  ret <32 x i16> %#2
}
=>
define <32 x i16> @avx512_psllv_w_512_poison(<32 x i16> %v) {
#0:
  %#1 = shl <32 x i16> %v, { poison, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }
  ret <32 x i16> %#1
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 1224. PassManager<Function> : Skipping NOP
-- 1225. PassManager<Function> : Skipping NOP
-- 1226. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_128_masked(<8 x i16> %v, <8 x i16> %a) {
#0:
  %#1 = and <8 x i16> %a, { 15, 0, 0, 0, poison, poison, poison, poison }
  %#2 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
Transformation seems to be correct! (syntactically equal)

-- 1227. InstCombinePass

----------------------------------------
define <8 x i16> @sse2_psra_w_128_masked(<8 x i16> %v, <8 x i16> %a) {
#0:
  %#1 = and <8 x i16> %a, { 15, 0, 0, 0, poison, poison, poison, poison }
  %#2 = x86_sse2_psra_w <8 x i16> %v, <8 x i16> %#1
  ret <8 x i16> %#2
}
=>
define <8 x i16> @sse2_psra_w_128_masked(<8 x i16> %v, <8 x i16> %a) {
#0:
  %#1 = and <8 x i16> %a, { 15, poison, poison, poison, poison, poison, poison, poison }
  %#2 = shufflevector <8 x i16> %#1, <8 x i16> poison, 0, 0, 0, 0, 0, 0, 0, 0
  %#3 = ashr <8 x i16> %v, %#2
  ret <8 x i16> %#3
}
Transformation doesn't verify! (unsound)
ERROR: Value mismatch

Example:
<8 x i16> %v = < #x0000 (0), #xe333 (58163, -7373), #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #x8ccc (36044, -29492), #xe333 (58163, -7373) >
<8 x i16> %a = < undef, #x0003 (3)	[based on undef], #x0003 (3)	[based on undef], #x0003 (3)	[based on undef], poison, poison, poison, poison >

Source:
<8 x i16> %#1 = < #x0003 (3)	[based on undef], #x0000 (0), #x0000 (0), #x0000 (0), poison, poison, poison, poison >
<8 x i16> %#2 = < #x0000 (0)	[based on undef], #xfc66 (64614, -922)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #xf199 (61849, -3687)	[based on undef], #xfc66 (64614, -922)	[based on undef] >

Target:
<8 x i16> %#1 = < #x0000 (0), poison, poison, poison, poison, poison, poison, poison >
<8 x i16> %#2 = < #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #x0002 (2), #x0000 (0) >
<8 x i16> %#3 = < #x0000 (0), #xe333 (58163, -7373), #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #xe333 (58163, -7373), #xe333 (58163, -7373) >
Source value: < #x0000 (0)	[based on undef], #xfc66 (64614, -922)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #x0000 (0)	[based on undef], #xf199 (61849, -3687)	[based on undef], #xfc66 (64614, -922)	[based on undef] >
Target value: < #x0000 (0), #xe333 (58163, -7373), #x0000 (0), #x0000 (0), #x0000 (0), #x0000 (0), #xe333 (58163, -7373), #xe333 (58163, -7373) >

Pass: InstCombinePass
Command line: '/home/nlopes/llvm/build/bin/opt' '-load=/home/nlopes/alive2/build/tv/tv.so' '-load-pass-plugin=/home/nlopes/alive2/build/tv/tv.so' '-tv-exit-on-error' '-passes=instcombine' '-mtriple=x86_64-unknown-unknown' '-S' '-tv-smt-to=20000' '-tv-report-dir=/home/nlopes/alive2/build/logs' '-tv-smt-stats'
Wrote bitcode to: "/home/nlopes/alive2/build/logs/in_KjGoeJbR_sLRQ.bc"


------------------- SMT STATS -------------------
Num queries: 1054
Num invalid: 0
Num skips:   0
Num trivial: 1226 (53.8%)
Num timeout: 117 (11.1%)
Num errors:  0 (0.0%)
Num SAT:     622 (59.0%)
Num UNSAT:   315 (29.9%)
Alive2: Transform doesn't verify; aborting!

stderr:

/home/nlopes/alive2/build/opt-alive.sh < /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll -passes=instcombine -mtriple=x86_64-unknown-unknown -S | /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll # RUN: at line 2
+ /home/nlopes/alive2/build/opt-alive.sh -passes=instcombine -mtriple=x86_64-unknown-unknown -S
+ /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll

FileCheck error: '<stdin>' is empty.
FileCheck command line:  /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll

NOTE: This test would pass if undef didn't exist!

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