Test source: git
Source: <stdin>
-- 1. ModuleToFunctionPassAdaptor
-- 1. PassManager<llvm::Function> : Skipping NOP
-- 2. InstCombinePass
----------------------------------------
define <16 x i8> @identity_test(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <16 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 3. InstCombinePass
----------------------------------------
define <16 x i8> @identity_test(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <16 x i8> %#1
}
=>
define <16 x i8> @identity_test(<16 x i8> %InVec) {
#0:
ret <16 x i8> %InVec
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 4. PassManager<llvm::Function> : Skipping NOP
-- 5. PassManager<llvm::Function> : Skipping NOP
-- 6. InstCombinePass
----------------------------------------
define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
#0:
%#1 = x86_avx2_pshuf_b <32 x i8> %InVec, <32 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <32 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 7. InstCombinePass
----------------------------------------
define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
#0:
%#1 = x86_avx2_pshuf_b <32 x i8> %InVec, <32 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <32 x i8> %#1
}
=>
define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
#0:
ret <32 x i8> %InVec
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 8. PassManager<llvm::Function> : Skipping NOP
-- 9. PassManager<llvm::Function> : Skipping NOP
-- 10. InstCombinePass
----------------------------------------
define <64 x i8> @identity_test_avx512(<64 x i8> %InVec) {
#0:
%#1 = x86_avx512_pshuf_b_512 <64 x i8> %InVec, <64 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <64 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 11. InstCombinePass
----------------------------------------
define <64 x i8> @identity_test_avx512(<64 x i8> %InVec) {
#0:
%#1 = x86_avx512_pshuf_b_512 <64 x i8> %InVec, <64 x i8> { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
ret <64 x i8> %#1
}
=>
define <64 x i8> @identity_test_avx512(<64 x i8> %InVec) {
#0:
ret <64 x i8> %InVec
}
Transformation doesn't verify! (not unsound)
ERROR: Timeout
-- 12. PassManager<llvm::Function> : Skipping NOP
-- 13. PassManager<llvm::Function> : Skipping NOP
-- 14. InstCombinePass
----------------------------------------
define <16 x i8> @fold_to_zero_vector(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <16 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 15. InstCombinePass
----------------------------------------
define <16 x i8> @fold_to_zero_vector(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <16 x i8> %#1
}
=>
define <16 x i8> @fold_to_zero_vector(<16 x i8> %InVec) {
#0:
ret <16 x i8> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!
-- 16. PassManager<llvm::Function> : Skipping NOP
-- 17. PassManager<llvm::Function> : Skipping NOP
-- 18. InstCombinePass
----------------------------------------
define <32 x i8> @fold_to_zero_vector_avx2(<32 x i8> %InVec) {
#0:
%#1 = x86_avx2_pshuf_b <32 x i8> %InVec, <32 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <32 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 19. InstCombinePass
----------------------------------------
define <32 x i8> @fold_to_zero_vector_avx2(<32 x i8> %InVec) {
#0:
%#1 = x86_avx2_pshuf_b <32 x i8> %InVec, <32 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <32 x i8> %#1
}
=>
define <32 x i8> @fold_to_zero_vector_avx2(<32 x i8> %InVec) {
#0:
ret <32 x i8> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!
-- 20. PassManager<llvm::Function> : Skipping NOP
-- 21. PassManager<llvm::Function> : Skipping NOP
-- 22. InstCombinePass
----------------------------------------
define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
#0:
%#1 = x86_avx512_pshuf_b_512 <64 x i8> %InVec, <64 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <64 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 23. InstCombinePass
----------------------------------------
define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
#0:
%#1 = x86_avx512_pshuf_b_512 <64 x i8> %InVec, <64 x i8> { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }
ret <64 x i8> %#1
}
=>
define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
#0:
ret <64 x i8> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}
Transformation seems to be correct!
-- 24. PassManager<llvm::Function> : Skipping NOP
-- 25. PassManager<llvm::Function> : Skipping NOP
-- 26. InstCombinePass
----------------------------------------
define <16 x i8> @splat_test(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
ret <16 x i8> %#1
}
Transformation seems to be correct! (syntactically equal)
-- 27. InstCombinePass
----------------------------------------
define <16 x i8> @splat_test(<16 x i8> %InVec) {
#0:
%#1 = x86_ssse3_pshuf_b_128 <16 x i8> %InVec, <16 x i8> { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
ret <16 x i8> %#1
}
=>
define <16 x i8> @splat_test(<16 x i8> %InVec) {
#0:
%#1 = shufflevector <16 x i8> %InVec, <16 x i8> poison, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
ret <16 x i8> %#1
}
Transformation doesn't verify! (unsound)
ERROR: Value mismatch
Example:
<16 x i8> %InVec = < undef, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison, poison >
Source:
<16 x i8> %#1 = < #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef] >
Target:
<16 x i8> %#1 = < #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x01 (1), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0) >
Source value: < #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef], #x03 (3) [based on undef] >
Target value: < #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x01 (1), #x00 (0), #x00 (0), #x00 (0), #x00 (0), #x00 (0) >
Pass: InstCombinePass
Command line: '/home/nlopes/llvm/build/bin/opt' '-load=/home/nlopes/alive2/build/tv/tv.so' '-load-pass-plugin=/home/nlopes/alive2/build/tv/tv.so' '-tv-exit-on-error' '-passes=instcombine' '-mtriple=x86_64-unknown-unknown' '-S' '-tv-smt-to=20000' '-tv-report-dir=/home/nlopes/alive2/build/logs' '-tv-smt-stats'
Wrote bitcode to: "/home/nlopes/alive2/build/logs/in_WDahbl2j_ismP.bc"
------------------- SMT STATS -------------------
Num queries: 57
Num invalid: 0
Num skips: 0
Num trivial: 95 (62.5%)
Num timeout: 3 (5.3%)
Num errors: 0 (0.0%)
Num SAT: 48 (84.2%)
Num UNSAT: 6 (10.5%)
Alive2: Transform doesn't verify; aborting!
RUN: at line 2: /home/nlopes/alive2/build/opt-alive.sh < /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll -passes=instcombine -mtriple=x86_64-unknown-unknown -S | /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll + /home/nlopes/alive2/build/opt-alive.sh -passes=instcombine -mtriple=x86_64-unknown-unknown -S + /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll FileCheck error: '<stdin>' is empty. FileCheck command line: /bitbucket/nlopes/llvm/build/bin/FileCheck /bitbucket/nlopes/llvm/llvm/test/Transforms/InstCombine/X86/x86-pshufb-inseltpoison.ll
NOTE: This test would pass if undef didn't exist!